Commit d700dff4 authored by Horatiu Vultur's avatar Horatiu Vultur Committed by David S. Miller
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net: lan966x: Add registers that are use for ptp functionality 



Add the registers that will be used to configure the PHC in the HW.

Signed-off-by: default avatarHoratiu Vultur <horatiu.vultur@microchip.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 2f92512e

drivers/net/ethernet/microchip/lan966x/lan966x_main.c

+1 −0
Original line number Diff line number Diff line
@@ -44,6 +44,7 @@ static const struct lan966x_main_io_resource lan966x_main_iomap[] = { 
	{ TARGET_ORG,                         0, 1 }, /* 0xe2000000 */

	{ TARGET_GCB,                    0x4000, 1 }, /* 0xe2004000 */

	{ TARGET_QS,                     0x8000, 1 }, /* 0xe2008000 */

	{ TARGET_PTP,                    0xc000, 1 }, /* 0xe200c000 */

	{ TARGET_CHIP_TOP,              0x10000, 1 }, /* 0xe2010000 */

	{ TARGET_REW,                   0x14000, 1 }, /* 0xe2014000 */

	{ TARGET_SYS,                   0x28000, 1 }, /* 0xe2028000 */

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

+103 −0
Original line number Diff line number Diff line
@@ -19,6 +19,7 @@ enum lan966x_target { 
	TARGET_DEV = 13,

	TARGET_GCB = 27,

	TARGET_ORG = 36,

	TARGET_PTP = 41,

	TARGET_QS = 42,

	TARGET_QSYS = 46,

	TARGET_REW = 47,
@@ -559,6 +560,108 @@ enum lan966x_target { 
#define DEV_PCS1G_STICKY_LINK_DOWN_STICKY_GET(x)\

	FIELD_GET(DEV_PCS1G_STICKY_LINK_DOWN_STICKY, x)



/*      PTP:PTP_CFG:PTP_DOM_CFG */

#define PTP_DOM_CFG               __REG(TARGET_PTP, 0, 1, 512, 0, 1, 16, 12, 0, 1, 4)



#define PTP_DOM_CFG_ENA                          GENMASK(11, 9)

#define PTP_DOM_CFG_ENA_SET(x)\

	FIELD_PREP(PTP_DOM_CFG_ENA, x)

#define PTP_DOM_CFG_ENA_GET(x)\

	FIELD_GET(PTP_DOM_CFG_ENA, x)



#define PTP_DOM_CFG_CLKCFG_DIS                   GENMASK(2, 0)

#define PTP_DOM_CFG_CLKCFG_DIS_SET(x)\

	FIELD_PREP(PTP_DOM_CFG_CLKCFG_DIS, x)

#define PTP_DOM_CFG_CLKCFG_DIS_GET(x)\

	FIELD_GET(PTP_DOM_CFG_CLKCFG_DIS, x)



/*      PTP:PTP_TOD_DOMAINS:CLK_PER_CFG */

#define PTP_CLK_PER_CFG(g, r)     __REG(TARGET_PTP, 0, 1, 528, g, 3, 28, 0, r, 2, 4)



/*      PTP:PTP_PINS:PTP_PIN_CFG */

#define PTP_PIN_CFG(g)            __REG(TARGET_PTP, 0, 1, 0, g, 8, 64, 0, 0, 1, 4)



#define PTP_PIN_CFG_PIN_ACTION                   GENMASK(29, 27)

#define PTP_PIN_CFG_PIN_ACTION_SET(x)\

	FIELD_PREP(PTP_PIN_CFG_PIN_ACTION, x)

#define PTP_PIN_CFG_PIN_ACTION_GET(x)\

	FIELD_GET(PTP_PIN_CFG_PIN_ACTION, x)



#define PTP_PIN_CFG_PIN_SYNC                     GENMASK(26, 25)

#define PTP_PIN_CFG_PIN_SYNC_SET(x)\

	FIELD_PREP(PTP_PIN_CFG_PIN_SYNC, x)

#define PTP_PIN_CFG_PIN_SYNC_GET(x)\

	FIELD_GET(PTP_PIN_CFG_PIN_SYNC, x)



#define PTP_PIN_CFG_PIN_DOM                      GENMASK(17, 16)

#define PTP_PIN_CFG_PIN_DOM_SET(x)\

	FIELD_PREP(PTP_PIN_CFG_PIN_DOM, x)

#define PTP_PIN_CFG_PIN_DOM_GET(x)\

	FIELD_GET(PTP_PIN_CFG_PIN_DOM, x)



/*      PTP:PTP_PINS:PTP_TOD_SEC_MSB */

#define PTP_TOD_SEC_MSB(g)        __REG(TARGET_PTP, 0, 1, 0, g, 8, 64, 4, 0, 1, 4)



#define PTP_TOD_SEC_MSB_TOD_SEC_MSB              GENMASK(15, 0)

#define PTP_TOD_SEC_MSB_TOD_SEC_MSB_SET(x)\

	FIELD_PREP(PTP_TOD_SEC_MSB_TOD_SEC_MSB, x)

#define PTP_TOD_SEC_MSB_TOD_SEC_MSB_GET(x)\

	FIELD_GET(PTP_TOD_SEC_MSB_TOD_SEC_MSB, x)



/*      PTP:PTP_PINS:PTP_TOD_SEC_LSB */

#define PTP_TOD_SEC_LSB(g)        __REG(TARGET_PTP, 0, 1, 0, g, 8, 64, 8, 0, 1, 4)



/*      PTP:PTP_PINS:PTP_TOD_NSEC */

#define PTP_TOD_NSEC(g)           __REG(TARGET_PTP, 0, 1, 0, g, 8, 64, 12, 0, 1, 4)



#define PTP_TOD_NSEC_TOD_NSEC                    GENMASK(29, 0)

#define PTP_TOD_NSEC_TOD_NSEC_SET(x)\

	FIELD_PREP(PTP_TOD_NSEC_TOD_NSEC, x)

#define PTP_TOD_NSEC_TOD_NSEC_GET(x)\

	FIELD_GET(PTP_TOD_NSEC_TOD_NSEC, x)



/*      PTP:PTP_TS_FIFO:PTP_TWOSTEP_CTRL */

#define PTP_TWOSTEP_CTRL          __REG(TARGET_PTP, 0, 1, 612, 0, 1, 12, 0, 0, 1, 4)



#define PTP_TWOSTEP_CTRL_NXT                     BIT(11)

#define PTP_TWOSTEP_CTRL_NXT_SET(x)\

	FIELD_PREP(PTP_TWOSTEP_CTRL_NXT, x)

#define PTP_TWOSTEP_CTRL_NXT_GET(x)\

	FIELD_GET(PTP_TWOSTEP_CTRL_NXT, x)



#define PTP_TWOSTEP_CTRL_VLD                     BIT(10)

#define PTP_TWOSTEP_CTRL_VLD_SET(x)\

	FIELD_PREP(PTP_TWOSTEP_CTRL_VLD, x)

#define PTP_TWOSTEP_CTRL_VLD_GET(x)\

	FIELD_GET(PTP_TWOSTEP_CTRL_VLD, x)



#define PTP_TWOSTEP_CTRL_STAMP_TX                BIT(9)

#define PTP_TWOSTEP_CTRL_STAMP_TX_SET(x)\

	FIELD_PREP(PTP_TWOSTEP_CTRL_STAMP_TX, x)

#define PTP_TWOSTEP_CTRL_STAMP_TX_GET(x)\

	FIELD_GET(PTP_TWOSTEP_CTRL_STAMP_TX, x)



#define PTP_TWOSTEP_CTRL_STAMP_PORT              GENMASK(8, 1)

#define PTP_TWOSTEP_CTRL_STAMP_PORT_SET(x)\

	FIELD_PREP(PTP_TWOSTEP_CTRL_STAMP_PORT, x)

#define PTP_TWOSTEP_CTRL_STAMP_PORT_GET(x)\

	FIELD_GET(PTP_TWOSTEP_CTRL_STAMP_PORT, x)



#define PTP_TWOSTEP_CTRL_OVFL                    BIT(0)

#define PTP_TWOSTEP_CTRL_OVFL_SET(x)\

	FIELD_PREP(PTP_TWOSTEP_CTRL_OVFL, x)

#define PTP_TWOSTEP_CTRL_OVFL_GET(x)\

	FIELD_GET(PTP_TWOSTEP_CTRL_OVFL, x)



/*      PTP:PTP_TS_FIFO:PTP_TWOSTEP_STAMP */

#define PTP_TWOSTEP_STAMP         __REG(TARGET_PTP, 0, 1, 612, 0, 1, 12, 4, 0, 1, 4)



#define PTP_TWOSTEP_STAMP_STAMP_NSEC             GENMASK(31, 2)

#define PTP_TWOSTEP_STAMP_STAMP_NSEC_SET(x)\

	FIELD_PREP(PTP_TWOSTEP_STAMP_STAMP_NSEC, x)

#define PTP_TWOSTEP_STAMP_STAMP_NSEC_GET(x)\

	FIELD_GET(PTP_TWOSTEP_STAMP_STAMP_NSEC, x)



/*      DEVCPU_QS:XTR:XTR_GRP_CFG */

#define QS_XTR_GRP_CFG(r)         __REG(TARGET_QS, 0, 1, 0, 0, 1, 36, 0, r, 2, 4)