Commit d6f1c681 authored by Marijn Suijten's avatar Marijn Suijten Committed by Stephen Boyd
Browse files

clk: qcom: gcc-msm8998: Move parent names and mapping below GPLLs 



Prepare for a future patch where we use .hw pointers to these GPLL
clocks in the parent mapping instead of name references.  This requires
the GPLL clocks to be decared before parent_data arrays.

Reviewed-by: default avatarAngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Signed-off-by: default avatarMarijn Suijten <marijn.suijten@somainline.org>
Link: https://lore.kernel.org/r/20210911121340.261920-2-marijn.suijten@somainline.org


Signed-off-by: default avatarStephen Boyd <sboyd@kernel.org>
parent 17c774ab

drivers/clk/qcom/gcc-msm8998.c

+92 −92
Original line number Diff line number Diff line
@@ -25,98 +25,6 @@ 
#include "reset.h"

#include "gdsc.h"



enum {

	P_AUD_REF_CLK,

	P_CORE_BI_PLL_TEST_SE,

	P_GPLL0_OUT_MAIN,

	P_GPLL4_OUT_MAIN,

	P_PLL0_EARLY_DIV_CLK_SRC,

	P_SLEEP_CLK,

	P_XO,

};



static const struct parent_map gcc_parent_map_0[] = {

	{ P_XO, 0 },

	{ P_GPLL0_OUT_MAIN, 1 },

	{ P_PLL0_EARLY_DIV_CLK_SRC, 6 },

	{ P_CORE_BI_PLL_TEST_SE, 7 },

};



static const char * const gcc_parent_names_0[] = {

	"xo",

	"gpll0_out_main",

	"gpll0_out_main",

	"core_bi_pll_test_se",

};



static const struct parent_map gcc_parent_map_1[] = {

	{ P_XO, 0 },

	{ P_GPLL0_OUT_MAIN, 1 },

	{ P_CORE_BI_PLL_TEST_SE, 7 },

};



static const char * const gcc_parent_names_1[] = {

	"xo",

	"gpll0_out_main",

	"core_bi_pll_test_se",

};



static const struct parent_map gcc_parent_map_2[] = {

	{ P_XO, 0 },

	{ P_GPLL0_OUT_MAIN, 1 },

	{ P_SLEEP_CLK, 5 },

	{ P_PLL0_EARLY_DIV_CLK_SRC, 6 },

	{ P_CORE_BI_PLL_TEST_SE, 7 },

};



static const char * const gcc_parent_names_2[] = {

	"xo",

	"gpll0_out_main",

	"core_pi_sleep_clk",

	"gpll0_out_main",

	"core_bi_pll_test_se",

};



static const struct parent_map gcc_parent_map_3[] = {

	{ P_XO, 0 },

	{ P_SLEEP_CLK, 5 },

	{ P_CORE_BI_PLL_TEST_SE, 7 },

};



static const char * const gcc_parent_names_3[] = {

	"xo",

	"core_pi_sleep_clk",

	"core_bi_pll_test_se",

};



static const struct parent_map gcc_parent_map_4[] = {

	{ P_XO, 0 },

	{ P_GPLL0_OUT_MAIN, 1 },

	{ P_GPLL4_OUT_MAIN, 5 },

	{ P_CORE_BI_PLL_TEST_SE, 7 },

};



static const char * const gcc_parent_names_4[] = {

	"xo",

	"gpll0_out_main",

	"gpll4_out_main",

	"core_bi_pll_test_se",

};



static const struct parent_map gcc_parent_map_5[] = {

	{ P_XO, 0 },

	{ P_GPLL0_OUT_MAIN, 1 },

	{ P_AUD_REF_CLK, 2 },

	{ P_CORE_BI_PLL_TEST_SE, 7 },

};



static const char * const gcc_parent_names_5[] = {

	"xo",

	"gpll0_out_main",

	"aud_ref_clk",

	"core_bi_pll_test_se",

};



static struct clk_fixed_factor xo = {

	.mult = 1,

	.div = 1,
@@ -438,6 +346,98 @@ static struct clk_alpha_pll_postdiv gpll4_out_test = { 
	},

};



enum {

	P_AUD_REF_CLK,

	P_CORE_BI_PLL_TEST_SE,

	P_GPLL0_OUT_MAIN,

	P_GPLL4_OUT_MAIN,

	P_PLL0_EARLY_DIV_CLK_SRC,

	P_SLEEP_CLK,

	P_XO,

};



static const struct parent_map gcc_parent_map_0[] = {

	{ P_XO, 0 },

	{ P_GPLL0_OUT_MAIN, 1 },

	{ P_PLL0_EARLY_DIV_CLK_SRC, 6 },

	{ P_CORE_BI_PLL_TEST_SE, 7 },

};



static const char * const gcc_parent_names_0[] = {

	"xo",

	"gpll0_out_main",

	"gpll0_out_main",

	"core_bi_pll_test_se",

};



static const struct parent_map gcc_parent_map_1[] = {

	{ P_XO, 0 },

	{ P_GPLL0_OUT_MAIN, 1 },

	{ P_CORE_BI_PLL_TEST_SE, 7 },

};



static const char * const gcc_parent_names_1[] = {

	"xo",

	"gpll0_out_main",

	"core_bi_pll_test_se",

};



static const struct parent_map gcc_parent_map_2[] = {

	{ P_XO, 0 },

	{ P_GPLL0_OUT_MAIN, 1 },

	{ P_SLEEP_CLK, 5 },

	{ P_PLL0_EARLY_DIV_CLK_SRC, 6 },

	{ P_CORE_BI_PLL_TEST_SE, 7 },

};



static const char * const gcc_parent_names_2[] = {

	"xo",

	"gpll0_out_main",

	"core_pi_sleep_clk",

	"gpll0_out_main",

	"core_bi_pll_test_se",

};



static const struct parent_map gcc_parent_map_3[] = {

	{ P_XO, 0 },

	{ P_SLEEP_CLK, 5 },

	{ P_CORE_BI_PLL_TEST_SE, 7 },

};



static const char * const gcc_parent_names_3[] = {

	"xo",

	"core_pi_sleep_clk",

	"core_bi_pll_test_se",

};



static const struct parent_map gcc_parent_map_4[] = {

	{ P_XO, 0 },

	{ P_GPLL0_OUT_MAIN, 1 },

	{ P_GPLL4_OUT_MAIN, 5 },

	{ P_CORE_BI_PLL_TEST_SE, 7 },

};



static const char * const gcc_parent_names_4[] = {

	"xo",

	"gpll0_out_main",

	"gpll4_out_main",

	"core_bi_pll_test_se",

};



static const struct parent_map gcc_parent_map_5[] = {

	{ P_XO, 0 },

	{ P_GPLL0_OUT_MAIN, 1 },

	{ P_AUD_REF_CLK, 2 },

	{ P_CORE_BI_PLL_TEST_SE, 7 },

};



static const char * const gcc_parent_names_5[] = {

	"xo",

	"gpll0_out_main",

	"aud_ref_clk",

	"core_bi_pll_test_se",

};



static const struct freq_tbl ftbl_blsp1_qup1_i2c_apps_clk_src[] = {

	F(19200000, P_XO, 1, 0, 0),

	F(50000000, P_GPLL0_OUT_MAIN, 12, 0, 0),