Commit d6bf74de authored by Alan Previn's avatar Alan Previn Committed by Radhakrishna Sripada
Browse files

drm/i915/pxp: Add GSC-CS back-end resource init and cleanup 



For MTL, the PXP back-end transport uses the GSC engine to submit
HECI packets through the HW to the GSC firmware for PXP arb
session management. This submission uses a non-priveleged
batch buffer, a buffer for the command packet and of course
a context targeting the GSC-CS.

Thus for MTL, we need to allocate and free a set of execution
submission resources for the management of the arbitration session.
Lets start with the context creation first since that object and
its usage is very straight-forward. We'll add the buffer allocation
and freeing later when we introduce the gsccs' send-message function.

Do this one time allocation of gsccs specific resources in
a new gsccs source file with intel_pxp_gsccs_init / fini functions
and hook them up from the PXP front-end.

Signed-off-by: default avatarAlan Previn <alan.previn.teres.alexis@intel.com>
Reviewed-by: default avatarDaniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: default avatarRadhakrishna Sripada <radhakrishna.sripada@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230511231738.1077674-2-alan.previn.teres.alexis@intel.com
parent 9275277d

drivers/gpu/drm/i915/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -339,6 +339,7 @@ i915-y += \ 
i915-$(CONFIG_DRM_I915_PXP) += \

	pxp/intel_pxp_cmd.o \

	pxp/intel_pxp_debugfs.o \

	pxp/intel_pxp_gsccs.o \

	pxp/intel_pxp_irq.o \

	pxp/intel_pxp_pm.o \

	pxp/intel_pxp_session.o

drivers/gpu/drm/i915/pxp/intel_pxp.c

+16 −4
Original line number Diff line number Diff line
@@ -12,6 +12,7 @@ 
#include "i915_drv.h"



#include "intel_pxp.h"

#include "intel_pxp_gsccs.h"

#include "intel_pxp_irq.h"

#include "intel_pxp_session.h"

#include "intel_pxp_tee.h"
@@ -132,6 +133,9 @@ static void pxp_init_full(struct intel_pxp *pxp) 
	if (ret)

		return;



	if (HAS_ENGINE(pxp->ctrl_gt, GSC0))

		ret = intel_pxp_gsccs_init(pxp);

	else

		ret = intel_pxp_tee_component_init(pxp);

	if (ret)

		goto out_context;
@@ -165,9 +169,12 @@ static struct intel_gt *find_gt_for_required_protected_content(struct drm_i915_p 
	/*

	 * For MTL onwards, PXP-controller-GT needs to have a valid GSC engine

	 * on the media GT. NOTE: if we have a media-tile with a GSC-engine,

	 * the VDBOX is already present so skip that check

	 * the VDBOX is already present so skip that check. We also have to

	 * ensure the GSC and HUC firmware are coming online

	 */

	if (i915->media_gt && HAS_ENGINE(i915->media_gt, GSC0))

	if (i915->media_gt && HAS_ENGINE(i915->media_gt, GSC0) &&

	    intel_uc_fw_is_loadable(&i915->media_gt->uc.gsc.fw) &&

	    intel_uc_fw_is_loadable(&i915->media_gt->uc.huc.fw))

		return i915->media_gt;



	/*
@@ -207,7 +214,9 @@ int intel_pxp_init(struct drm_i915_private *i915) 
	if (!i915->pxp)

		return -ENOMEM;



	/* init common info used by all feature-mode usages*/

	i915->pxp->ctrl_gt = gt;

	mutex_init(&i915->pxp->tee_mutex);



	/*

	 * If full PXP feature is not available but HuC is loaded by GSC on pre-MTL
@@ -229,6 +238,9 @@ void intel_pxp_fini(struct drm_i915_private *i915) 


	i915->pxp->arb_is_valid = false;



	if (HAS_ENGINE(i915->pxp->ctrl_gt, GSC0))

		intel_pxp_gsccs_fini(i915->pxp);

	else

		intel_pxp_tee_component_fini(i915->pxp);



	destroy_vcs_context(i915->pxp);

drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.c

0 → 100644
+63 −0
Original line number Diff line number Diff line 
// SPDX-License-Identifier: MIT

/*

 * Copyright(c) 2023 Intel Corporation.

 */



#include "gem/i915_gem_internal.h"



#include "gt/intel_context.h"



#include "i915_drv.h"

#include "intel_pxp_cmd_interface_43.h"

#include "intel_pxp_gsccs.h"

#include "intel_pxp_types.h"



static void

gsccs_destroy_execution_resource(struct intel_pxp *pxp)

{

	struct gsccs_session_resources *exec_res = &pxp->gsccs_res;



	if (exec_res->ce)

		intel_context_put(exec_res->ce);



	memset(exec_res, 0, sizeof(*exec_res));

}



static int

gsccs_allocate_execution_resource(struct intel_pxp *pxp)

{

	struct intel_gt *gt = pxp->ctrl_gt;

	struct gsccs_session_resources *exec_res = &pxp->gsccs_res;

	struct intel_engine_cs *engine = gt->engine[GSC0];

	struct intel_context *ce;



	/*

	 * First, ensure the GSC engine is present.

	 * NOTE: Backend would only be called with the correct gt.

	 */

	if (!engine)

		return -ENODEV;



	/* Finally, create an intel_context to be used during the submission */

	ce = intel_context_create(engine);

	if (IS_ERR(ce)) {

		drm_err(&gt->i915->drm, "Failed creating gsccs backend ctx\n");

		return PTR_ERR(ce);

	}



	i915_vm_put(ce->vm);

	ce->vm = i915_vm_get(pxp->ctrl_gt->vm);

	exec_res->ce = ce;



	return 0;

}



void intel_pxp_gsccs_fini(struct intel_pxp *pxp)

{

	gsccs_destroy_execution_resource(pxp);

}



int intel_pxp_gsccs_init(struct intel_pxp *pxp)

{

	return gsccs_allocate_execution_resource(pxp);

}

drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.h

0 → 100644
+29 −0
Original line number Diff line number Diff line 
/* SPDX-License-Identifier: MIT */

/*

 * Copyright(c) 2022, Intel Corporation. All rights reserved.

 */



#ifndef __INTEL_PXP_GSCCS_H__

#define __INTEL_PXP_GSCCS_H__



#include <linux/types.h>



struct intel_pxp;



#ifdef CONFIG_DRM_I915_PXP

void intel_pxp_gsccs_fini(struct intel_pxp *pxp);

int intel_pxp_gsccs_init(struct intel_pxp *pxp);



#else

static inline void intel_pxp_gsccs_fini(struct intel_pxp *pxp)

{

}



static inline int intel_pxp_gsccs_init(struct intel_pxp *pxp)

{

	return 0;

}



#endif



#endif /*__INTEL_PXP_GSCCS_H__ */

drivers/gpu/drm/i915/pxp/intel_pxp_tee.c

+0 −2
Original line number Diff line number Diff line
@@ -284,8 +284,6 @@ int intel_pxp_tee_component_init(struct intel_pxp *pxp) 
	struct intel_gt *gt = pxp->ctrl_gt;

	struct drm_i915_private *i915 = gt->i915;



	mutex_init(&pxp->tee_mutex);



	ret = alloc_streaming_command(pxp);

	if (ret)

		return ret;