Commit d6b8a8c4 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux 

Pull clk fixes from Stephen Boyd:
 "A couple more patches that would be good to get into -rc1:

   - Revert an i.MX patch that's causing video failures because division
     math goes sideways

   - Fix a clang + W=1 build isue where FIELD_PREP() is taking a 32-bit
     variable instead of the usual u64 type

   - Fix a Kconfig bug in the StarFive JH7110 clk config that selects a
     reset controller when it can't be selected"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux:
  clk: starfive: Fix RESET_STARFIVE_JH7110 can't be selected in a specified case
  clk: sp7021: Adjust width of _m in HWM_FIELD_PREP()
  Revert "clk: imx: composite-8m: Add support to determine_rate"
parents 1c1094e4 31c6ed4e

drivers/clk/clk-sp7021.c

+1 −1
Original line number Diff line number Diff line
@@ -41,7 +41,7 @@ enum { 
/* HIWORD_MASK FIELD_PREP */

#define HWM_FIELD_PREP(mask, value)		\

({						\

	u32 _m = mask;				\

	u64 _m = mask;				\

	(_m << 16) | FIELD_PREP(_m, value);	\

})

drivers/clk/imx/clk-composite-8m.c

+0 −7
Original line number Diff line number Diff line
@@ -119,17 +119,10 @@ static int imx8m_clk_composite_divider_set_rate(struct clk_hw *hw, 
	return ret;

}



static int imx8m_clk_divider_determine_rate(struct clk_hw *hw,

				      struct clk_rate_request *req)

{

	return clk_divider_ops.determine_rate(hw, req);

}



static const struct clk_ops imx8m_clk_composite_divider_ops = {

	.recalc_rate = imx8m_clk_composite_divider_recalc_rate,

	.round_rate = imx8m_clk_composite_divider_round_rate,

	.set_rate = imx8m_clk_composite_divider_set_rate,

	.determine_rate = imx8m_clk_divider_determine_rate,

};



static u8 imx8m_clk_composite_mux_get_parent(struct clk_hw *hw)

drivers/clk/starfive/Kconfig

+1 −4
Original line number Diff line number Diff line
@@ -26,7 +26,7 @@ config CLK_STARFIVE_JH7110_SYS 
	depends on ARCH_STARFIVE || COMPILE_TEST

	select AUXILIARY_BUS

	select CLK_STARFIVE_JH71X0

	select RESET_STARFIVE_JH7110

	select RESET_STARFIVE_JH7110 if RESET_CONTROLLER

	default ARCH_STARFIVE

	help

	  Say yes here to support the system clock controller on the
@@ -35,9 +35,6 @@ config CLK_STARFIVE_JH7110_SYS 
config CLK_STARFIVE_JH7110_AON

	tristate "StarFive JH7110 always-on clock support"

	depends on CLK_STARFIVE_JH7110_SYS

	select AUXILIARY_BUS

	select CLK_STARFIVE_JH71X0

	select RESET_STARFIVE_JH7110

	default m if ARCH_STARFIVE

	help

	  Say yes here to support the always-on clock controller on the