Commit d65f24c9 authored by Ido Schimmel's avatar Ido Schimmel Committed by Jakub Kicinski
Browse files

mlxsw: spectrum_acl: Add port range key element 



Add the port range key element to supported key blocks so that it could
be used to match on the output of the port range registers. Each bit in
the element can be used to match on the output of the port range
register with the corresponding index.

Signed-off-by: default avatarIdo Schimmel <idosch@nvidia.com>
Reviewed-by: default avatarPetr Machata <petrm@nvidia.com>
Signed-off-by: default avatarPetr Machata <petrm@nvidia.com>
Link: https://lore.kernel.org/r/f0423f6ee9e36c6b0a426bc9995f42223c48f2db.1689092769.git.petrm@nvidia.com


Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent 74d6786c

drivers/net/ethernet/mellanox/mlxsw/core_acl_flex_keys.c

+1 −0
Original line number Diff line number Diff line
@@ -43,6 +43,7 @@ static const struct mlxsw_afk_element_info mlxsw_afk_element_infos[] = { 
	MLXSW_AFK_ELEMENT_INFO_BUF(DST_IP_32_63, 0x38, 4),

	MLXSW_AFK_ELEMENT_INFO_BUF(DST_IP_0_31, 0x3C, 4),

	MLXSW_AFK_ELEMENT_INFO_U32(FDB_MISS, 0x40, 0, 1),

	MLXSW_AFK_ELEMENT_INFO_U32(L4_PORT_RANGE, 0x40, 1, 16),

};



struct mlxsw_afk {

drivers/net/ethernet/mellanox/mlxsw/core_acl_flex_keys.h

+1 −0
Original line number Diff line number Diff line
@@ -36,6 +36,7 @@ enum mlxsw_afk_element { 
	MLXSW_AFK_ELEMENT_VIRT_ROUTER_MSB,

	MLXSW_AFK_ELEMENT_VIRT_ROUTER_LSB,

	MLXSW_AFK_ELEMENT_FDB_MISS,

	MLXSW_AFK_ELEMENT_L4_PORT_RANGE,

	MLXSW_AFK_ELEMENT_MAX,

};

drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_flex_keys.c

+3 −0
Original line number Diff line number Diff line
@@ -31,12 +31,14 @@ static struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_l2_smac_ex[] = { 


static struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_ipv4_sip[] = {

	MLXSW_AFK_ELEMENT_INST_BUF(SRC_IP_0_31, 0x00, 4),

	MLXSW_AFK_ELEMENT_INST_U32(L4_PORT_RANGE, 0x04, 16, 16),

	MLXSW_AFK_ELEMENT_INST_U32(IP_PROTO, 0x08, 0, 8),

	MLXSW_AFK_ELEMENT_INST_U32(SRC_SYS_PORT, 0x0C, 0, 16),

};



static struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_ipv4_dip[] = {

	MLXSW_AFK_ELEMENT_INST_BUF(DST_IP_0_31, 0x00, 4),

	MLXSW_AFK_ELEMENT_INST_U32(L4_PORT_RANGE, 0x04, 16, 16),

	MLXSW_AFK_ELEMENT_INST_U32(IP_PROTO, 0x08, 0, 8),

	MLXSW_AFK_ELEMENT_INST_U32(SRC_SYS_PORT, 0x0C, 0, 16),

};
@@ -205,6 +207,7 @@ static struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_l4_0[] = { 


static struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_l4_2[] = {

	MLXSW_AFK_ELEMENT_INST_U32(TCP_FLAGS, 0x04, 16, 9), /* TCP_CONTROL + TCP_ECN */

	MLXSW_AFK_ELEMENT_INST_U32(L4_PORT_RANGE, 0x04, 0, 16),

};



static const struct mlxsw_afk_block mlxsw_sp2_afk_blocks[] = {