Loading sound/soc/codecs/rt5514.c +21 −2 Original line number Diff line number Diff line Loading @@ -906,9 +906,23 @@ static int rt5514_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask, if (rx_mask || tx_mask) val |= RT5514_TDM_MODE; if (slots == 4) switch (slots) { case 4: val |= RT5514_TDMSLOT_SEL_RX_4CH | RT5514_TDMSLOT_SEL_TX_4CH; break; case 6: val |= RT5514_TDMSLOT_SEL_RX_6CH | RT5514_TDMSLOT_SEL_TX_6CH; break; case 8: val |= RT5514_TDMSLOT_SEL_RX_8CH | RT5514_TDMSLOT_SEL_TX_8CH; break; case 2: default: break; } switch (slot_width) { case 20: Loading @@ -919,6 +933,10 @@ static int rt5514_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask, val |= RT5514_CH_LEN_RX_24 | RT5514_CH_LEN_TX_24; break; case 25: val |= RT5514_TDM_MODE2; break; case 32: val |= RT5514_CH_LEN_RX_32 | RT5514_CH_LEN_TX_32; break; Loading @@ -930,7 +948,8 @@ static int rt5514_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask, regmap_update_bits(rt5514->regmap, RT5514_I2S_CTRL1, RT5514_TDM_MODE | RT5514_TDMSLOT_SEL_RX_MASK | RT5514_TDMSLOT_SEL_TX_MASK | RT5514_CH_LEN_RX_MASK | RT5514_CH_LEN_TX_MASK, val); RT5514_CH_LEN_RX_MASK | RT5514_CH_LEN_TX_MASK | RT5514_TDM_MODE2, val); return 0; } Loading sound/soc/codecs/rt5514.h +6 −0 Original line number Diff line number Diff line Loading @@ -117,6 +117,8 @@ #define RT5514_POW_ADCFEDL_BIT 0 /* RT5514_I2S_CTRL1 (0x2010) */ #define RT5514_TDM_MODE2 (0x1 << 30) #define RT5514_TDM_MODE2_SFT 30 #define RT5514_TDM_MODE (0x1 << 28) #define RT5514_TDM_MODE_SFT 28 #define RT5514_I2S_LR_MASK (0x1 << 26) Loading @@ -136,6 +138,8 @@ #define RT5514_TDMSLOT_SEL_RX_MASK (0x3 << 10) #define RT5514_TDMSLOT_SEL_RX_SFT 10 #define RT5514_TDMSLOT_SEL_RX_4CH (0x1 << 10) #define RT5514_TDMSLOT_SEL_RX_6CH (0x2 << 10) #define RT5514_TDMSLOT_SEL_RX_8CH (0x3 << 10) #define RT5514_CH_LEN_RX_MASK (0x3 << 8) #define RT5514_CH_LEN_RX_SFT 8 #define RT5514_CH_LEN_RX_16 (0x0 << 8) Loading @@ -145,6 +149,8 @@ #define RT5514_TDMSLOT_SEL_TX_MASK (0x3 << 6) #define RT5514_TDMSLOT_SEL_TX_SFT 6 #define RT5514_TDMSLOT_SEL_TX_4CH (0x1 << 6) #define RT5514_TDMSLOT_SEL_TX_6CH (0x2 << 6) #define RT5514_TDMSLOT_SEL_TX_8CH (0x3 << 6) #define RT5514_CH_LEN_TX_MASK (0x3 << 4) #define RT5514_CH_LEN_TX_SFT 4 #define RT5514_CH_LEN_TX_16 (0x0 << 4) Loading Loading
sound/soc/codecs/rt5514.c +21 −2 Original line number Diff line number Diff line Loading @@ -906,9 +906,23 @@ static int rt5514_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask, if (rx_mask || tx_mask) val |= RT5514_TDM_MODE; if (slots == 4) switch (slots) { case 4: val |= RT5514_TDMSLOT_SEL_RX_4CH | RT5514_TDMSLOT_SEL_TX_4CH; break; case 6: val |= RT5514_TDMSLOT_SEL_RX_6CH | RT5514_TDMSLOT_SEL_TX_6CH; break; case 8: val |= RT5514_TDMSLOT_SEL_RX_8CH | RT5514_TDMSLOT_SEL_TX_8CH; break; case 2: default: break; } switch (slot_width) { case 20: Loading @@ -919,6 +933,10 @@ static int rt5514_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask, val |= RT5514_CH_LEN_RX_24 | RT5514_CH_LEN_TX_24; break; case 25: val |= RT5514_TDM_MODE2; break; case 32: val |= RT5514_CH_LEN_RX_32 | RT5514_CH_LEN_TX_32; break; Loading @@ -930,7 +948,8 @@ static int rt5514_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask, regmap_update_bits(rt5514->regmap, RT5514_I2S_CTRL1, RT5514_TDM_MODE | RT5514_TDMSLOT_SEL_RX_MASK | RT5514_TDMSLOT_SEL_TX_MASK | RT5514_CH_LEN_RX_MASK | RT5514_CH_LEN_TX_MASK, val); RT5514_CH_LEN_RX_MASK | RT5514_CH_LEN_TX_MASK | RT5514_TDM_MODE2, val); return 0; } Loading
sound/soc/codecs/rt5514.h +6 −0 Original line number Diff line number Diff line Loading @@ -117,6 +117,8 @@ #define RT5514_POW_ADCFEDL_BIT 0 /* RT5514_I2S_CTRL1 (0x2010) */ #define RT5514_TDM_MODE2 (0x1 << 30) #define RT5514_TDM_MODE2_SFT 30 #define RT5514_TDM_MODE (0x1 << 28) #define RT5514_TDM_MODE_SFT 28 #define RT5514_I2S_LR_MASK (0x1 << 26) Loading @@ -136,6 +138,8 @@ #define RT5514_TDMSLOT_SEL_RX_MASK (0x3 << 10) #define RT5514_TDMSLOT_SEL_RX_SFT 10 #define RT5514_TDMSLOT_SEL_RX_4CH (0x1 << 10) #define RT5514_TDMSLOT_SEL_RX_6CH (0x2 << 10) #define RT5514_TDMSLOT_SEL_RX_8CH (0x3 << 10) #define RT5514_CH_LEN_RX_MASK (0x3 << 8) #define RT5514_CH_LEN_RX_SFT 8 #define RT5514_CH_LEN_RX_16 (0x0 << 8) Loading @@ -145,6 +149,8 @@ #define RT5514_TDMSLOT_SEL_TX_MASK (0x3 << 6) #define RT5514_TDMSLOT_SEL_TX_SFT 6 #define RT5514_TDMSLOT_SEL_TX_4CH (0x1 << 6) #define RT5514_TDMSLOT_SEL_TX_6CH (0x2 << 6) #define RT5514_TDMSLOT_SEL_TX_8CH (0x3 << 6) #define RT5514_CH_LEN_TX_MASK (0x3 << 4) #define RT5514_CH_LEN_TX_SFT 4 #define RT5514_CH_LEN_TX_16 (0x0 << 4) Loading