Commit d607667b authored by Ben Chuang's avatar Ben Chuang Committed by Ulf Hansson
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mmc: sdhci-pci-gli: Add runtime PM for GL9763E 



Add runtime PM for GL9763E and disable PLL in runtime suspend. So power
gated of upstream port can be enabled. GL9763E has an auxiliary power
so it keep states in runtime suspend. In runtime resume, PLL is enabled
and waits for it to stabilize.

Signed-off-by: default avatarBen Chuang <ben.chuang@genesyslogic.com.tw>
Tested-by: default avatarKevin Chang <kevin.chang@lcfuturecenter.com>
Acked-by: default avatarAdrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/20220307090009.1386876-1-benchuanggli@gmail.com


Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
parent 23e1b8c1

drivers/mmc/host/sdhci-pci-gli.c

+47 −0
Original line number Diff line number Diff line
@@ -13,6 +13,7 @@ 
#include <linux/mmc/mmc.h>

#include <linux/delay.h>

#include <linux/of.h>

#include <linux/iopoll.h>

#include "sdhci.h"

#include "sdhci-pci.h"

#include "cqhci.h"
@@ -951,6 +952,47 @@ static void gli_set_gl9763e(struct sdhci_pci_slot *slot) 
	pci_write_config_dword(pdev, PCIE_GLI_9763E_VHS, value);

}



#ifdef CONFIG_PM

static int gl9763e_runtime_suspend(struct sdhci_pci_chip *chip)

{

	struct sdhci_pci_slot *slot = chip->slots[0];

	struct sdhci_host *host = slot->host;

	u16 clock;



	clock = sdhci_readw(host, SDHCI_CLOCK_CONTROL);

	clock &= ~(SDHCI_CLOCK_PLL_EN | SDHCI_CLOCK_CARD_EN);

	sdhci_writew(host, clock, SDHCI_CLOCK_CONTROL);



	return 0;

}



static int gl9763e_runtime_resume(struct sdhci_pci_chip *chip)

{

	struct sdhci_pci_slot *slot = chip->slots[0];

	struct sdhci_host *host = slot->host;

	u16 clock;



	clock = sdhci_readw(host, SDHCI_CLOCK_CONTROL);



	clock |= SDHCI_CLOCK_PLL_EN;

	clock &= ~SDHCI_CLOCK_INT_STABLE;

	sdhci_writew(host, clock, SDHCI_CLOCK_CONTROL);



	/* Wait max 150 ms */

	if (read_poll_timeout(sdhci_readw, clock, (clock & SDHCI_CLOCK_INT_STABLE),

			      1000, 150000, false, host, SDHCI_CLOCK_CONTROL)) {

		pr_err("%s: PLL clock never stabilised.\n",

		       mmc_hostname(host->mmc));

		sdhci_dumpregs(host);

	}



	clock |= SDHCI_CLOCK_CARD_EN;

	sdhci_writew(host, clock, SDHCI_CLOCK_CONTROL);



	return 0;

}

#endif



static int gli_probe_slot_gl9763e(struct sdhci_pci_slot *slot)

{

	struct pci_dev *pdev = slot->chip->pdev;
@@ -1060,6 +1102,11 @@ const struct sdhci_pci_fixes sdhci_gl9763e = { 
#ifdef CONFIG_PM_SLEEP

	.resume		= sdhci_cqhci_gli_resume,

	.suspend	= sdhci_cqhci_gli_suspend,

#endif

#ifdef CONFIG_PM

	.runtime_suspend = gl9763e_runtime_suspend,

	.runtime_resume  = gl9763e_runtime_resume,

	.allow_runtime_pm = true,

#endif

	.add_host       = gl9763e_add_host,

};