Commit d5d786fb authored by Robert Hancock's avatar Robert Hancock Committed by Jonathan Cameron
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iio: adc: xilinx-ams: Fixed wrong sequencer register settings



Register settings used for the sequencer configuration register
were incorrect, causing some inputs to not be read properly.

Fixes: d5c70627 ("iio: adc: Add Xilinx AMS driver")
Signed-off-by: default avatarRobert Hancock <robert.hancock@calian.com>
Reviewed-by: default avatarMichael Tretter <m.tretter@pengutronix.de>
Acked-by: default avatarMichal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/20220127173450.3684318-4-robert.hancock@calian.com


Cc: <Stable@vger.kernel.org>
Signed-off-by: default avatarJonathan Cameron <Jonathan.Cameron@huawei.com>
parent 1f21a415
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Original line number Diff line number Diff line
@@ -92,8 +92,8 @@

#define AMS_CONF1_SEQ_MASK		GENMASK(15, 12)
#define AMS_CONF1_SEQ_DEFAULT		FIELD_PREP(AMS_CONF1_SEQ_MASK, 0)
#define AMS_CONF1_SEQ_CONTINUOUS	FIELD_PREP(AMS_CONF1_SEQ_MASK, 1)
#define AMS_CONF1_SEQ_SINGLE_CHANNEL	FIELD_PREP(AMS_CONF1_SEQ_MASK, 2)
#define AMS_CONF1_SEQ_CONTINUOUS	FIELD_PREP(AMS_CONF1_SEQ_MASK, 2)
#define AMS_CONF1_SEQ_SINGLE_CHANNEL	FIELD_PREP(AMS_CONF1_SEQ_MASK, 3)

#define AMS_REG_SEQ0_MASK		GENMASK(15, 0)
#define AMS_REG_SEQ2_MASK		GENMASK(21, 16)