Commit d5b5f63c authored by José Roberto de Souza's avatar José Roberto de Souza
Browse files

drm: Rename DP_PSR_SELECTIVE_UPDATE to better mach eDP spec 



DP_PSR_EN_CFG bit 5 aka "Selective Update Region Scan Line Capture
Indication" in eDP spec has a ambiguous name, so renaming to better
match specification.

While at it, replacing bit shit by BIT() macro and adding the version
some registers were added to eDP specification.

Cc: <dri-devel@lists.freedesktop.org>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Signed-off-by: default avatarJosé Roberto de Souza <jose.souza@intel.com>
Acked-by: default avatarDaniel Vetter <daniel.vetter@intel.com>
Reviewed-by: default avatarGwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210421220224.200729-1-jose.souza@intel.com
parent 7a6e95f3

include/drm/drm_dp_helper.h

+8 −8
Original line number Diff line number Diff line
@@ -688,13 +688,13 @@ struct drm_device; 
# define DP_DECOMPRESSION_EN                (1 << 0)



#define DP_PSR_EN_CFG				0x170   /* XXX 1.2? */

# define DP_PSR_ENABLE			    (1 << 0)

# define DP_PSR_MAIN_LINK_ACTIVE	    (1 << 1)

# define DP_PSR_CRC_VERIFICATION	    (1 << 2)

# define DP_PSR_FRAME_CAPTURE		    (1 << 3)

# define DP_PSR_SELECTIVE_UPDATE	    (1 << 4)

# define DP_PSR_IRQ_HPD_WITH_CRC_ERRORS     (1 << 5)

# define DP_PSR_ENABLE_PSR2		    (1 << 6) /* eDP 1.4a */

# define DP_PSR_ENABLE				BIT(0)

# define DP_PSR_MAIN_LINK_ACTIVE		BIT(1)

# define DP_PSR_CRC_VERIFICATION		BIT(2)

# define DP_PSR_FRAME_CAPTURE			BIT(3)

# define DP_PSR_SU_REGION_SCANLINE_CAPTURE	BIT(4) /* eDP 1.4a */

# define DP_PSR_IRQ_HPD_WITH_CRC_ERRORS		BIT(5) /* eDP 1.4a */

# define DP_PSR_ENABLE_PSR2			BIT(6) /* eDP 1.4a */



#define DP_ADAPTER_CTRL			    0x1a0

# define DP_ADAPTER_CTRL_FORCE_LOAD_SENSE   (1 << 0)