Commit d593d64f authored by Prasad Sodagudi's avatar Prasad Sodagudi Committed by Arnd Bergmann
Browse files

lib: Add register read/write tracing support 



Generic MMIO read/write i.e., __raw_{read,write}{b,l,w,q} accessors
are typically used to read/write from/to memory mapped registers
and can cause hangs or some undefined behaviour in following few
cases,

* If the access to the register space is unclocked, for example: if
  there is an access to multimedia(MM) block registers without MM
  clocks.

* If the register space is protected and not set to be accessible from
  non-secure world, for example: only EL3 (EL: Exception level) access
  is allowed and any EL2/EL1 access is forbidden.

* If xPU(memory/register protection units) is controlling access to
  certain memory/register space for specific clients.

and more...

Such cases usually results in instant reboot/SErrors/NOC or interconnect
hangs and tracing these register accesses can be very helpful to debug
such issues during initial development stages and also in later stages.

So use ftrace trace events to log such MMIO register accesses which
provides rich feature set such as early enablement of trace events,
filtering capability, dumping ftrace logs on console and many more.

Sample output:

rwmmio_write: __qcom_geni_serial_console_write+0x160/0x1e0 width=32 val=0xa0d5d addr=0xfffffbfffdbff700
rwmmio_post_write: __qcom_geni_serial_console_write+0x160/0x1e0 width=32 val=0xa0d5d addr=0xfffffbfffdbff700
rwmmio_read: qcom_geni_serial_poll_bit+0x94/0x138 width=32 addr=0xfffffbfffdbff610
rwmmio_post_read: qcom_geni_serial_poll_bit+0x94/0x138 width=32 val=0x0 addr=0xfffffbfffdbff610

Co-developed-by: default avatarSai Prakash Ranjan <quic_saipraka@quicinc.com>
Signed-off-by: default avatarPrasad Sodagudi <psodagud@codeaurora.org>
Signed-off-by: default avatarSai Prakash Ranjan <quic_saipraka@quicinc.com>
Acked-by: default avatarSteven Rostedt (Google) <rostedt@goodmis.org>
Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parent 98692f52

arch/Kconfig

+3 −0
Original line number Diff line number Diff line
@@ -1396,6 +1396,9 @@ config ARCH_HAS_ELFCORE_COMPAT 
config ARCH_HAS_PARANOID_L1D_FLUSH

	bool



config ARCH_HAVE_TRACE_MMIO_ACCESS

	bool



config DYNAMIC_SIGFRAME

	bool

arch/arm64/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -49,6 +49,7 @@ config ARM64 
	select ARCH_HAS_ZONE_DMA_SET if EXPERT

	select ARCH_HAVE_ELF_PROT

	select ARCH_HAVE_NMI_SAFE_CMPXCHG

	select ARCH_HAVE_TRACE_MMIO_ACCESS

	select ARCH_INLINE_READ_LOCK if !PREEMPTION

	select ARCH_INLINE_READ_LOCK_BH if !PREEMPTION

	select ARCH_INLINE_READ_LOCK_IRQ if !PREEMPTION

include/trace/events/rwmmio.h

0 → 100644
+97 −0
Original line number Diff line number Diff line 
/* SPDX-License-Identifier: GPL-2.0-only */

/*

 * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.

 */

#undef TRACE_SYSTEM

#define TRACE_SYSTEM rwmmio



#if !defined(_TRACE_RWMMIO_H) || defined(TRACE_HEADER_MULTI_READ)

#define _TRACE_RWMMIO_H



#include <linux/tracepoint.h>



DECLARE_EVENT_CLASS(rwmmio_rw_template,



	TP_PROTO(unsigned long caller, u64 val, u8 width, volatile void __iomem *addr),



	TP_ARGS(caller, val, width, addr),



	TP_STRUCT__entry(

		__field(unsigned long, caller)

		__field(unsigned long, addr)

		__field(u64, val)

		__field(u8, width)

	),



	TP_fast_assign(

		__entry->caller = caller;

		__entry->val = val;

		__entry->addr = (unsigned long)addr;

		__entry->width = width;

	),



	TP_printk("%pS width=%d val=%#llx addr=%#lx",

		(void *)__entry->caller, __entry->width,

		__entry->val, __entry->addr)

);



DEFINE_EVENT(rwmmio_rw_template, rwmmio_write,

	TP_PROTO(unsigned long caller, u64 val, u8 width, volatile void __iomem *addr),

	TP_ARGS(caller, val, width, addr)

);



DEFINE_EVENT(rwmmio_rw_template, rwmmio_post_write,

	TP_PROTO(unsigned long caller, u64 val, u8 width, volatile void __iomem *addr),

	TP_ARGS(caller, val, width, addr)

);



TRACE_EVENT(rwmmio_read,



	TP_PROTO(unsigned long caller, u8 width, const volatile void __iomem *addr),



	TP_ARGS(caller, width, addr),



	TP_STRUCT__entry(

		__field(unsigned long, caller)

		__field(unsigned long, addr)

		__field(u8, width)

	),



	TP_fast_assign(

		__entry->caller = caller;

		__entry->addr = (unsigned long)addr;

		__entry->width = width;

	),



	TP_printk("%pS width=%d addr=%#lx",

		 (void *)__entry->caller, __entry->width, __entry->addr)

);



TRACE_EVENT(rwmmio_post_read,



	TP_PROTO(unsigned long caller, u64 val, u8 width, const volatile void __iomem *addr),



	TP_ARGS(caller, val, width, addr),



	TP_STRUCT__entry(

		__field(unsigned long, caller)

		__field(unsigned long, addr)

		__field(u64, val)

		__field(u8, width)

	),



	TP_fast_assign(

		__entry->caller = caller;

		__entry->val = val;

		__entry->addr = (unsigned long)addr;

		__entry->width = width;

	),



	TP_printk("%pS width=%d val=%#llx addr=%#lx",

		 (void *)__entry->caller, __entry->width,

		 __entry->val, __entry->addr)

);



#endif /* _TRACE_RWMMIO_H */



#include <trace/define_trace.h>

lib/Kconfig

+7 −0
Original line number Diff line number Diff line
@@ -118,6 +118,13 @@ config INDIRECT_IOMEM_FALLBACK 
	  mmio accesses when the IO memory address is not a registered

	  emulated region.



config TRACE_MMIO_ACCESS

	bool "Register read/write tracing"

	depends on TRACING && ARCH_HAVE_TRACE_MMIO_ACCESS

	help

	  Create tracepoints for MMIO read/write operations. These trace events

	  can be used for logging all MMIO read/write operations.



source "lib/crypto/Kconfig"



config CRC_CCITT

lib/Makefile

+2 −0
Original line number Diff line number Diff line
@@ -151,6 +151,8 @@ lib-y += logic_pio.o 


lib-$(CONFIG_INDIRECT_IOMEM) += logic_iomem.o



obj-$(CONFIG_TRACE_MMIO_ACCESS) += trace_readwrite.o



obj-$(CONFIG_GENERIC_HWEIGHT) += hweight.o



obj-$(CONFIG_BTREE) += btree.o