Commit d4f6b987 authored by Krzysztof Kozlowski's avatar Krzysztof Kozlowski Committed by Greg Kroah-Hartman
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dt-bindings: usb: samsung,exynos-dwc3: allow unit address in DTS 



The Samsung Exynos SoC USB 3.0 DWC3 Controller is a simple wrapper of
actual DWC3 Controller device node.  It handles necessary Samsung
Exynos-specific resources (regulators, clocks), but does not have its
own MMIO address space.

However neither simple-bus bindings nor dtc W=1 accept device nodes in
soc@ node which do not have unit address.

Signed-off-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20230127211748.260718-1-krzysztof.kozlowski@linaro.org


Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 21ef9c91

Documentation/devicetree/bindings/usb/samsung,exynos-dwc3.yaml

+4 −4
Original line number Diff line number Diff line
@@ -108,19 +108,19 @@ examples: 
    #include <dt-bindings/clock/exynos5420.h>

    #include <dt-bindings/interrupt-controller/arm-gic.h>



    usb {

    usb@12000000 {

        compatible = "samsung,exynos5250-dwusb3";

        #address-cells = <1>;

        #size-cells = <1>;

        ranges;

        ranges = <0x0 0x12000000 0x10000>;

        clocks = <&clock CLK_USBD300>;

        clock-names = "usbdrd30";

        vdd33-supply = <&ldo9_reg>;

        vdd10-supply = <&ldo11_reg>;



        usb@12000000 {

        usb@0 {

            compatible = "snps,dwc3";

            reg = <0x12000000 0x10000>;

            reg = <0x0 0x10000>;

            interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;

            phys = <&usbdrd_phy0 0>, <&usbdrd_phy0 1>;

            phy-names = "usb2-phy", "usb3-phy";