Commit d4caa72e authored by Anthony Koo's avatar Anthony Koo Committed by Alex Deucher
Browse files

drm/amd/display: change from panel to panel cntl 



[Why]
it doesn't represent panel specifically, it's more like the control
logic for the panel

[How]
change from panel to panel cntl to make it a bit more clear

Signed-off-by: default avatarAnthony Koo <Anthony.Koo@amd.com>
Reviewed-by: default avatarTony Cheng <Tony.Cheng@amd.com>
Acked-by: default avatarRodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent e9e7123a

drivers/gpu/drm/amd/display/dc/core/dc_link.c

+17 −17
Original line number Diff line number Diff line
@@ -47,7 +47,7 @@ 
#include "hw/clk_mgr.h"

#include "dce/dmub_psr.h"

#include "dmub/inc/dmub_cmd_dal.h"

#include "inc/hw/panel.h"

#include "inc/hw/panel_cntl.h"



#define DC_LOGGER_INIT(logger)
@@ -88,8 +88,8 @@ static void dc_link_destruct(struct dc_link *link) 
	if (link->ddc)

		dal_ddc_service_destroy(&link->ddc);



	if (link->panel)

		link->panel->funcs->destroy(&link->panel);

	if (link->panel_cntl)

		link->panel_cntl->funcs->destroy(&link->panel_cntl);



	if (link->link_enc)

		link->link_enc->funcs->destroy(&link->link_enc);
@@ -1359,7 +1359,7 @@ static bool dc_link_construct(struct dc_link *link, 
	struct ddc_service_init_data ddc_service_init_data = { { 0 } };

	struct dc_context *dc_ctx = init_params->ctx;

	struct encoder_init_data enc_init_data = { 0 };

	struct panel_init_data panel_init_data = { 0 };

	struct panel_cntl_init_data panel_cntl_init_data = { 0 };

	struct integrated_info info = {{{ 0 }}};

	struct dc_bios *bios = init_params->dc->ctx->dc_bios;

	const struct dc_vbios_funcs *bp_funcs = bios->funcs;
@@ -1461,18 +1461,18 @@ static bool dc_link_construct(struct dc_link *link, 
		dal_ddc_get_line(dal_ddc_service_get_ddc_pin(link->ddc));





	if (link->dc->res_pool->funcs->panel_create &&

	if (link->dc->res_pool->funcs->panel_cntl_create &&

		(link->link_id.id == CONNECTOR_ID_EDP ||

			link->link_id.id == CONNECTOR_ID_LVDS)) {

		panel_init_data.ctx = dc_ctx;

		panel_init_data.inst = 0;

		link->panel =

			link->dc->res_pool->funcs->panel_create(

								&panel_init_data);

		panel_cntl_init_data.ctx = dc_ctx;

		panel_cntl_init_data.inst = 0;

		link->panel_cntl =

			link->dc->res_pool->funcs->panel_cntl_create(

								&panel_cntl_init_data);



		if (link->panel == NULL) {

			DC_ERROR("Failed to create link panel!\n");

			goto panel_create_fail;

		if (link->panel_cntl == NULL) {

			DC_ERROR("Failed to create link panel_cntl!\n");

			goto panel_cntl_create_fail;

		}

	}
@@ -1558,9 +1558,9 @@ static bool dc_link_construct(struct dc_link *link, 
device_tag_fail:

	link->link_enc->funcs->destroy(&link->link_enc);

link_enc_create_fail:

	if (link->panel != NULL)

		link->panel->funcs->destroy(&link->panel);

panel_create_fail:

	if (link->panel_cntl != NULL)

		link->panel_cntl->funcs->destroy(&link->panel_cntl);

panel_cntl_create_fail:

	dal_ddc_service_destroy(&link->ddc);

ddc_create_fail:

create_fail:

drivers/gpu/drm/amd/display/dc/dc_link.h

+1 −1
Original line number Diff line number Diff line
@@ -135,7 +135,7 @@ struct dc_link { 


	struct dc_context *ctx;



	struct panel *panel;

	struct panel_cntl *panel_cntl;

	struct link_encoder *link_enc;

	struct graphics_object_id link_id;

	union ddi_channel_mapping ddi_channel_mapping;

drivers/gpu/drm/amd/display/dc/dce/Makefile

+1 −1
Original line number Diff line number Diff line
@@ -29,7 +29,7 @@ 
DCE = dce_audio.o dce_stream_encoder.o dce_link_encoder.o dce_hwseq.o \

dce_mem_input.o dce_clock_source.o dce_scl_filters.o dce_transform.o \

dce_opp.o dce_dmcu.o dce_abm.o dce_ipp.o dce_aux.o \

dce_i2c.o dce_i2c_hw.o dce_i2c_sw.o dmub_psr.o dmub_abm.o dce_panel.o

dce_i2c.o dce_i2c_hw.o dce_i2c_sw.o dmub_psr.o dmub_abm.o dce_panel_cntl.o



AMD_DAL_DCE = $(addprefix $(AMDDALPATH)/dc/dce/,$(DCE))

drivers/gpu/drm/amd/display/dc/dce/dce_panel.c→drivers/gpu/drm/amd/display/dc/dce/dce_panel_cntl.c

+32 −32
Original line number Diff line number Diff line
@@ -26,33 +26,33 @@ 
#include "reg_helper.h"

#include "core_types.h"

#include "dc_dmub_srv.h"

#include "panel.h"

#include "dce_panel.h"

#include "panel_cntl.h"

#include "dce_panel_cntl.h"



#define TO_DCE_PANEL(panel)\

	container_of(panel, struct dce_panel, base)

#define TO_DCE_PANEL_CNTL(panel_cntl)\

	container_of(panel_cntl, struct dce_panel_cntl, base)



#define CTX \

	dce_panel->base.ctx

	dce_panel_cntl->base.ctx



#define DC_LOGGER \

	dce_panel->base.ctx->logger

	dce_panel_cntl->base.ctx->logger



#define REG(reg)\

	dce_panel->regs->reg

	dce_panel_cntl->regs->reg



#undef FN

#define FN(reg_name, field_name) \

	dce_panel->shift->field_name, dce_panel->mask->field_name

	dce_panel_cntl->shift->field_name, dce_panel_cntl->mask->field_name



void dce_panel_hw_init(struct panel *panel)

void dce_panel_cntl_hw_init(struct panel_cntl *panel_cntl)

{



}



bool dce_is_panel_backlight_on(struct panel *panel)

bool dce_is_panel_backlight_on(struct panel_cntl *panel_cntl)

{

	struct dce_panel *dce_panel = TO_DCE_PANEL(panel);

	struct dce_panel_cntl *dce_panel_cntl = TO_DCE_PANEL_CNTL(panel_cntl);

	uint32_t value;



	REG_GET(PWRSEQ_CNTL, BLON, &value);
@@ -60,9 +60,9 @@ bool dce_is_panel_backlight_on(struct panel *panel) 
	return value;

}



bool dce_is_panel_powered_on(struct panel *panel)

bool dce_is_panel_powered_on(struct panel_cntl *panel_cntl)

{

	struct dce_panel *dce_panel = TO_DCE_PANEL(panel);

	struct dce_panel_cntl *dce_panel_cntl = TO_DCE_PANEL_CNTL(panel_cntl);

	uint32_t pwr_seq_state, dig_on, dig_on_ovrd;



	REG_GET(PWRSEQ_STATE, PWRSEQ_TARGET_STATE_R, &pwr_seq_state);
@@ -72,34 +72,34 @@ bool dce_is_panel_powered_on(struct panel *panel) 
	return (pwr_seq_state == 1) || (dig_on == 1 && dig_on_ovrd == 1);

}



static void dce_panel_destroy(struct panel **panel)

static void dce_panel_cntl_destroy(struct panel_cntl **panel_cntl)

{

	struct dce_panel *dce_panel = TO_DCE_PANEL(*panel);

	struct dce_panel_cntl *dce_panel_cntl = TO_DCE_PANEL_CNTL(*panel_cntl);



	kfree(dce_panel);

	*panel = NULL;

	kfree(dce_panel_cntl);

	*panel_cntl = NULL;

}



static const struct panel_funcs dce_link_panel_funcs = {

	.destroy = dce_panel_destroy,

	.hw_init = dce_panel_hw_init,

static const struct panel_cntl_funcs dce_link_panel_cntl_funcs = {

	.destroy = dce_panel_cntl_destroy,

	.hw_init = dce_panel_cntl_hw_init,

	.is_panel_backlight_on = dce_is_panel_backlight_on,

	.is_panel_powered_on = dce_is_panel_powered_on,



};



void dce_panel_construct(

	struct dce_panel *dce_panel,

	const struct panel_init_data *init_data,

	const struct dce_panel_registers *regs,

	const struct dce_panel_shift *shift,

	const struct dce_panel_mask *mask)

void dce_panel_cntl_construct(

	struct dce_panel_cntl *dce_panel_cntl,

	const struct panel_cntl_init_data *init_data,

	const struct dce_panel_cntl_registers *regs,

	const struct dce_panel_cntl_shift *shift,

	const struct dce_panel_cntl_mask *mask)

{

	dce_panel->regs = regs;

	dce_panel->shift = shift;

	dce_panel->mask = mask;

	dce_panel_cntl->regs = regs;

	dce_panel_cntl->shift = shift;

	dce_panel_cntl->mask = mask;



	dce_panel->base.funcs = &dce_link_panel_funcs;

	dce_panel->base.ctx = init_data->ctx;

	dce_panel->base.inst = init_data->inst;

	dce_panel_cntl->base.funcs = &dce_link_panel_cntl_funcs;

	dce_panel_cntl->base.ctx = init_data->ctx;

	dce_panel_cntl->base.inst = init_data->inst;

}

drivers/gpu/drm/amd/display/dc/dce/dce_panel.h→drivers/gpu/drm/amd/display/dc/dce/dce_panel_cntl.h

+43 −43
Original line number Diff line number Diff line
@@ -23,53 +23,53 @@ 
 *

 */



#ifndef __DC_PANEL__DCE_H__

#define __DC_PANEL__DCE_H__

#ifndef __DC_PANEL_CNTL__DCE_H__

#define __DC_PANEL_CNTL__DCE_H__



#include "panel.h"

#include "panel_cntl.h"



/* set register offset with instance */

#define DCE_PANEL_SR(reg_name, block)\

#define DCE_PANEL_CNTL_SR(reg_name, block)\

	.reg_name = mm ## block ## _ ## reg_name



#define DCE_PANEL_REG_LIST()\

	DCE_PANEL_SR(PWRSEQ_CNTL, LVTMA), \

	DCE_PANEL_SR(PWRSEQ_STATE, LVTMA), \

#define DCE_PANEL_CNTL_REG_LIST()\

	DCE_PANEL_CNTL_SR(PWRSEQ_CNTL, LVTMA), \

	DCE_PANEL_CNTL_SR(PWRSEQ_STATE, LVTMA), \

	SR(BL_PWM_CNTL), \

	SR(BL_PWM_CNTL2), \

	SR(BL_PWM_PERIOD_CNTL), \

	SR(BL_PWM_GRP1_REG_LOCK)



#define DCN_PANEL_SR(reg_name, block)\

#define DCN_PANEL_CNTL_SR(reg_name, block)\

	.reg_name = BASE(mm ## block ## _ ## reg_name ## _BASE_IDX) + \

					mm ## block ## _ ## reg_name



#define DCN_PANEL_REG_LIST()\

	DCN_PANEL_SR(PWRSEQ_CNTL, LVTMA), \

	DCN_PANEL_SR(PWRSEQ_STATE, LVTMA), \

#define DCN_PANEL_CNTL_REG_LIST()\

	DCN_PANEL_CNTL_SR(PWRSEQ_CNTL, LVTMA), \

	DCN_PANEL_CNTL_SR(PWRSEQ_STATE, LVTMA), \

	SR(BL_PWM_CNTL), \

	SR(BL_PWM_CNTL2), \

	SR(BL_PWM_PERIOD_CNTL), \

	SR(BL_PWM_GRP1_REG_LOCK)



#define DCE_PANEL_SF(block, reg_name, field_name, post_fix)\

#define DCE_PANEL_CNTL_SF(block, reg_name, field_name, post_fix)\

	.field_name = block ## reg_name ## __ ## block ## field_name ## post_fix



#define DCE_PANEL_MASK_SH_LIST(mask_sh) \

	DCE_PANEL_SF(LVTMA_, PWRSEQ_CNTL, BLON, mask_sh),\

	DCE_PANEL_SF(LVTMA_, PWRSEQ_CNTL, DIGON, mask_sh),\

	DCE_PANEL_SF(LVTMA_, PWRSEQ_CNTL, DIGON_OVRD, mask_sh),\

	DCE_PANEL_SF(LVTMA_, PWRSEQ_STATE, PWRSEQ_TARGET_STATE_R, mask_sh), \

	DCE_PANEL_SF(, BL_PWM_PERIOD_CNTL, BL_PWM_PERIOD, mask_sh), \

	DCE_PANEL_SF(, BL_PWM_PERIOD_CNTL, BL_PWM_PERIOD_BITCNT, mask_sh), \

	DCE_PANEL_SF(, BL_PWM_CNTL, BL_ACTIVE_INT_FRAC_CNT, mask_sh), \

	DCE_PANEL_SF(, BL_PWM_CNTL, BL_PWM_FRACTIONAL_EN, mask_sh), \

	DCE_PANEL_SF(, BL_PWM_CNTL, BL_PWM_EN, mask_sh), \

	DCE_PANEL_SF(, BL_PWM_GRP1_REG_LOCK, BL_PWM_GRP1_IGNORE_MASTER_LOCK_EN, mask_sh), \

	DCE_PANEL_SF(, BL_PWM_GRP1_REG_LOCK, BL_PWM_GRP1_REG_LOCK, mask_sh), \

	DCE_PANEL_SF(, BL_PWM_GRP1_REG_LOCK, BL_PWM_GRP1_REG_UPDATE_PENDING, mask_sh)

#define DCE_PANEL_CNTL_MASK_SH_LIST(mask_sh) \

	DCE_PANEL_CNTL_SF(LVTMA_, PWRSEQ_CNTL, BLON, mask_sh),\

	DCE_PANEL_CNTL_SF(LVTMA_, PWRSEQ_CNTL, DIGON, mask_sh),\

	DCE_PANEL_CNTL_SF(LVTMA_, PWRSEQ_CNTL, DIGON_OVRD, mask_sh),\

	DCE_PANEL_CNTL_SF(LVTMA_, PWRSEQ_STATE, PWRSEQ_TARGET_STATE_R, mask_sh), \

	DCE_PANEL_CNTL_SF(, BL_PWM_PERIOD_CNTL, BL_PWM_PERIOD, mask_sh), \

	DCE_PANEL_CNTL_SF(, BL_PWM_PERIOD_CNTL, BL_PWM_PERIOD_BITCNT, mask_sh), \

	DCE_PANEL_CNTL_SF(, BL_PWM_CNTL, BL_ACTIVE_INT_FRAC_CNT, mask_sh), \

	DCE_PANEL_CNTL_SF(, BL_PWM_CNTL, BL_PWM_FRACTIONAL_EN, mask_sh), \

	DCE_PANEL_CNTL_SF(, BL_PWM_CNTL, BL_PWM_EN, mask_sh), \

	DCE_PANEL_CNTL_SF(, BL_PWM_GRP1_REG_LOCK, BL_PWM_GRP1_IGNORE_MASTER_LOCK_EN, mask_sh), \

	DCE_PANEL_CNTL_SF(, BL_PWM_GRP1_REG_LOCK, BL_PWM_GRP1_REG_LOCK, mask_sh), \

	DCE_PANEL_CNTL_SF(, BL_PWM_GRP1_REG_LOCK, BL_PWM_GRP1_REG_UPDATE_PENDING, mask_sh)



#define DCE_PANEL_REG_FIELD_LIST(type) \

#define DCE_PANEL_CNTL_REG_FIELD_LIST(type) \

	type BLON;\

	type DIGON;\

	type DIGON_OVRD;\
@@ -83,15 +83,15 @@ 
	type BL_PWM_GRP1_REG_LOCK; \

	type BL_PWM_GRP1_REG_UPDATE_PENDING



struct dce_panel_shift {

	DCE_PANEL_REG_FIELD_LIST(uint8_t);

struct dce_panel_cntl_shift {

	DCE_PANEL_CNTL_REG_FIELD_LIST(uint8_t);

};



struct dce_panel_mask {

	DCE_PANEL_REG_FIELD_LIST(uint32_t);

struct dce_panel_cntl_mask {

	DCE_PANEL_CNTL_REG_FIELD_LIST(uint32_t);

};



struct dce_panel_registers {

struct dce_panel_cntl_registers {

	uint32_t PWRSEQ_CNTL;

	uint32_t PWRSEQ_STATE;

	uint32_t BL_PWM_CNTL;
@@ -100,18 +100,18 @@ struct dce_panel_registers { 
	uint32_t BL_PWM_GRP1_REG_LOCK;

};



struct dce_panel {

	struct panel base;

	const struct dce_panel_registers *regs;

	const struct dce_panel_shift *shift;

	const struct dce_panel_mask *mask;

struct dce_panel_cntl {

	struct panel_cntl base;

	const struct dce_panel_cntl_registers *regs;

	const struct dce_panel_cntl_shift *shift;

	const struct dce_panel_cntl_mask *mask;

};



void dce_panel_construct(

	struct dce_panel *panel,

	const struct panel_init_data *init_data,

	const struct dce_panel_registers *regs,

	const struct dce_panel_shift *shift,

	const struct dce_panel_mask *mask);

void dce_panel_cntl_construct(

	struct dce_panel_cntl *panel_cntl,

	const struct panel_cntl_init_data *init_data,

	const struct dce_panel_cntl_registers *regs,

	const struct dce_panel_cntl_shift *shift,

	const struct dce_panel_cntl_mask *mask);



#endif /* __DC_PANEL__DCE_H__ */
 
#endif /* __DC_PANEL_CNTL__DCE_H__ */