Commit d4c36765 authored by Vladimir Oltean's avatar Vladimir Oltean Committed by Jakub Kicinski
Browse files

net: mscc: ocelot: keep ocelot_stat_layout by reg address, not offset 



With so many counter addresses recently discovered as being wrong, it is
desirable to at least have a central database of information, rather
than two: one through the SYS_COUNT_* registers (used for
ndo_get_stats64), and the other through the offset field of struct
ocelot_stat_layout elements (used for ethtool -S).

The strategy will be to keep the SYS_COUNT_* definitions as the single
source of truth, but for that we need to expand our current definitions
to cover all registers. Then we need to convert the ocelot region
creation logic, and stats worker, to the read semantics imposed by going
through SYS_COUNT_* absolute register addresses, rather than offsets
of 32-bit words relative to SYS_COUNT_RX_OCTETS (which should have been
SYS_CNT, by the way).

Signed-off-by: default avatarVladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent 91904600

drivers/net/dsa/ocelot/felix_vsc9959.c

+160 −93
Original line number Diff line number Diff line
@@ -274,10 +274,14 @@ static const u32 vsc9959_rew_regmap[] = { 


static const u32 vsc9959_sys_regmap[] = {

	REG(SYS_COUNT_RX_OCTETS,		0x000000),

	REG(SYS_COUNT_RX_UNICAST,		0x000004),

	REG(SYS_COUNT_RX_MULTICAST,		0x000008),

	REG(SYS_COUNT_RX_BROADCAST,		0x00000c),

	REG(SYS_COUNT_RX_SHORTS,		0x000010),

	REG(SYS_COUNT_RX_FRAGMENTS,		0x000014),

	REG(SYS_COUNT_RX_JABBERS,		0x000018),

	REG(SYS_COUNT_RX_CRC_ALIGN_ERRS,	0x00001c),

	REG(SYS_COUNT_RX_SYM_ERRS,		0x000020),

	REG(SYS_COUNT_RX_64,			0x000024),

	REG(SYS_COUNT_RX_65_127,		0x000028),

	REG(SYS_COUNT_RX_128_255,		0x00002c),
@@ -288,9 +292,38 @@ static const u32 vsc9959_sys_regmap[] = { 
	REG(SYS_COUNT_RX_PAUSE,			0x000040),

	REG(SYS_COUNT_RX_CONTROL,		0x000044),

	REG(SYS_COUNT_RX_LONGS,			0x000048),

	REG(SYS_COUNT_RX_CLASSIFIED_DROPS,	0x00004c),

	REG(SYS_COUNT_RX_RED_PRIO_0,		0x000050),

	REG(SYS_COUNT_RX_RED_PRIO_1,		0x000054),

	REG(SYS_COUNT_RX_RED_PRIO_2,		0x000058),

	REG(SYS_COUNT_RX_RED_PRIO_3,		0x00005c),

	REG(SYS_COUNT_RX_RED_PRIO_4,		0x000060),

	REG(SYS_COUNT_RX_RED_PRIO_5,		0x000064),

	REG(SYS_COUNT_RX_RED_PRIO_6,		0x000068),

	REG(SYS_COUNT_RX_RED_PRIO_7,		0x00006c),

	REG(SYS_COUNT_RX_YELLOW_PRIO_0,		0x000070),

	REG(SYS_COUNT_RX_YELLOW_PRIO_1,		0x000074),

	REG(SYS_COUNT_RX_YELLOW_PRIO_2,		0x000078),

	REG(SYS_COUNT_RX_YELLOW_PRIO_3,		0x00007c),

	REG(SYS_COUNT_RX_YELLOW_PRIO_4,		0x000080),

	REG(SYS_COUNT_RX_YELLOW_PRIO_5,		0x000084),

	REG(SYS_COUNT_RX_YELLOW_PRIO_6,		0x000088),

	REG(SYS_COUNT_RX_YELLOW_PRIO_7,		0x00008c),

	REG(SYS_COUNT_RX_GREEN_PRIO_0,		0x000090),

	REG(SYS_COUNT_RX_GREEN_PRIO_1,		0x000094),

	REG(SYS_COUNT_RX_GREEN_PRIO_2,		0x000098),

	REG(SYS_COUNT_RX_GREEN_PRIO_3,		0x00009c),

	REG(SYS_COUNT_RX_GREEN_PRIO_4,		0x0000a0),

	REG(SYS_COUNT_RX_GREEN_PRIO_5,		0x0000a4),

	REG(SYS_COUNT_RX_GREEN_PRIO_6,		0x0000a8),

	REG(SYS_COUNT_RX_GREEN_PRIO_7,		0x0000ac),

	REG(SYS_COUNT_TX_OCTETS,		0x000200),

	REG(SYS_COUNT_TX_UNICAST,		0x000204),

	REG(SYS_COUNT_TX_MULTICAST,		0x000208),

	REG(SYS_COUNT_TX_BROADCAST,		0x00020c),

	REG(SYS_COUNT_TX_COLLISION,		0x000210),

	REG(SYS_COUNT_TX_DROPS,			0x000214),

	REG(SYS_COUNT_TX_PAUSE,			0x000218),

	REG(SYS_COUNT_TX_64,			0x00021c),

	REG(SYS_COUNT_TX_65_127,		0x000220),

	REG(SYS_COUNT_TX_128_255,		0x000224),
@@ -298,7 +331,41 @@ static const u32 vsc9959_sys_regmap[] = { 
	REG(SYS_COUNT_TX_512_1023,		0x00022c),

	REG(SYS_COUNT_TX_1024_1526,		0x000230),

	REG(SYS_COUNT_TX_1527_MAX,		0x000234),

	REG(SYS_COUNT_TX_YELLOW_PRIO_0,		0x000238),

	REG(SYS_COUNT_TX_YELLOW_PRIO_1,		0x00023c),

	REG(SYS_COUNT_TX_YELLOW_PRIO_2,		0x000240),

	REG(SYS_COUNT_TX_YELLOW_PRIO_3,		0x000244),

	REG(SYS_COUNT_TX_YELLOW_PRIO_4,		0x000248),

	REG(SYS_COUNT_TX_YELLOW_PRIO_5,		0x00024c),

	REG(SYS_COUNT_TX_YELLOW_PRIO_6,		0x000250),

	REG(SYS_COUNT_TX_YELLOW_PRIO_7,		0x000254),

	REG(SYS_COUNT_TX_GREEN_PRIO_0,		0x000258),

	REG(SYS_COUNT_TX_GREEN_PRIO_1,		0x00025c),

	REG(SYS_COUNT_TX_GREEN_PRIO_2,		0x000260),

	REG(SYS_COUNT_TX_GREEN_PRIO_3,		0x000264),

	REG(SYS_COUNT_TX_GREEN_PRIO_4,		0x000268),

	REG(SYS_COUNT_TX_GREEN_PRIO_5,		0x00026c),

	REG(SYS_COUNT_TX_GREEN_PRIO_6,		0x000270),

	REG(SYS_COUNT_TX_GREEN_PRIO_7,		0x000274),

	REG(SYS_COUNT_TX_AGING,			0x000278),

	REG(SYS_COUNT_DROP_LOCAL,		0x000400),

	REG(SYS_COUNT_DROP_TAIL,		0x000404),

	REG(SYS_COUNT_DROP_YELLOW_PRIO_0,	0x000408),

	REG(SYS_COUNT_DROP_YELLOW_PRIO_1,	0x00040c),

	REG(SYS_COUNT_DROP_YELLOW_PRIO_2,	0x000410),

	REG(SYS_COUNT_DROP_YELLOW_PRIO_3,	0x000414),

	REG(SYS_COUNT_DROP_YELLOW_PRIO_4,	0x000418),

	REG(SYS_COUNT_DROP_YELLOW_PRIO_5,	0x00041c),

	REG(SYS_COUNT_DROP_YELLOW_PRIO_6,	0x000420),

	REG(SYS_COUNT_DROP_YELLOW_PRIO_7,	0x000424),

	REG(SYS_COUNT_DROP_GREEN_PRIO_0,	0x000428),

	REG(SYS_COUNT_DROP_GREEN_PRIO_1,	0x00042c),

	REG(SYS_COUNT_DROP_GREEN_PRIO_2,	0x000430),

	REG(SYS_COUNT_DROP_GREEN_PRIO_3,	0x000434),

	REG(SYS_COUNT_DROP_GREEN_PRIO_4,	0x000438),

	REG(SYS_COUNT_DROP_GREEN_PRIO_5,	0x00043c),

	REG(SYS_COUNT_DROP_GREEN_PRIO_6,	0x000440),

	REG(SYS_COUNT_DROP_GREEN_PRIO_7,	0x000444),

	REG(SYS_RESET_CFG,			0x000e00),

	REG(SYS_SR_ETYPE_CFG,			0x000e04),

	REG(SYS_VLAN_ETYPE_CFG,			0x000e08),
@@ -554,375 +621,375 @@ static const struct reg_field vsc9959_regfields[REGFIELD_MAX] = { 
static const struct ocelot_stat_layout vsc9959_stats_layout[OCELOT_NUM_STATS] = {

	[OCELOT_STAT_RX_OCTETS] = {

		.name = "rx_octets",

		.offset = 0x00,

		.reg = SYS_COUNT_RX_OCTETS,

	},

	[OCELOT_STAT_RX_UNICAST] = {

		.name = "rx_unicast",

		.offset = 0x01,

		.reg = SYS_COUNT_RX_UNICAST,

	},

	[OCELOT_STAT_RX_MULTICAST] = {

		.name = "rx_multicast",

		.offset = 0x02,

		.reg = SYS_COUNT_RX_MULTICAST,

	},

	[OCELOT_STAT_RX_BROADCAST] = {

		.name = "rx_broadcast",

		.offset = 0x03,

		.reg = SYS_COUNT_RX_BROADCAST,

	},

	[OCELOT_STAT_RX_SHORTS] = {

		.name = "rx_shorts",

		.offset = 0x04,

		.reg = SYS_COUNT_RX_SHORTS,

	},

	[OCELOT_STAT_RX_FRAGMENTS] = {

		.name = "rx_fragments",

		.offset = 0x05,

		.reg = SYS_COUNT_RX_FRAGMENTS,

	},

	[OCELOT_STAT_RX_JABBERS] = {

		.name = "rx_jabbers",

		.offset = 0x06,

		.reg = SYS_COUNT_RX_JABBERS,

	},

	[OCELOT_STAT_RX_CRC_ALIGN_ERRS] = {

		.name = "rx_crc_align_errs",

		.offset = 0x07,

		.reg = SYS_COUNT_RX_CRC_ALIGN_ERRS,

	},

	[OCELOT_STAT_RX_SYM_ERRS] = {

		.name = "rx_sym_errs",

		.offset = 0x08,

		.reg = SYS_COUNT_RX_SYM_ERRS,

	},

	[OCELOT_STAT_RX_64] = {

		.name = "rx_frames_below_65_octets",

		.offset = 0x09,

		.reg = SYS_COUNT_RX_64,

	},

	[OCELOT_STAT_RX_65_127] = {

		.name = "rx_frames_65_to_127_octets",

		.offset = 0x0A,

		.reg = SYS_COUNT_RX_65_127,

	},

	[OCELOT_STAT_RX_128_255] = {

		.name = "rx_frames_128_to_255_octets",

		.offset = 0x0B,

		.reg = SYS_COUNT_RX_128_255,

	},

	[OCELOT_STAT_RX_256_511] = {

		.name = "rx_frames_256_to_511_octets",

		.offset = 0x0C,

		.reg = SYS_COUNT_RX_256_511,

	},

	[OCELOT_STAT_RX_512_1023] = {

		.name = "rx_frames_512_to_1023_octets",

		.offset = 0x0D,

		.reg = SYS_COUNT_RX_512_1023,

	},

	[OCELOT_STAT_RX_1024_1526] = {

		.name = "rx_frames_1024_to_1526_octets",

		.offset = 0x0E,

		.reg = SYS_COUNT_RX_1024_1526,

	},

	[OCELOT_STAT_RX_1527_MAX] = {

		.name = "rx_frames_over_1526_octets",

		.offset = 0x0F,

		.reg = SYS_COUNT_RX_1527_MAX,

	},

	[OCELOT_STAT_RX_PAUSE] = {

		.name = "rx_pause",

		.offset = 0x10,

		.reg = SYS_COUNT_RX_PAUSE,

	},

	[OCELOT_STAT_RX_CONTROL] = {

		.name = "rx_control",

		.offset = 0x11,

		.reg = SYS_COUNT_RX_CONTROL,

	},

	[OCELOT_STAT_RX_LONGS] = {

		.name = "rx_longs",

		.offset = 0x12,

		.reg = SYS_COUNT_RX_LONGS,

	},

	[OCELOT_STAT_RX_CLASSIFIED_DROPS] = {

		.name = "rx_classified_drops",

		.offset = 0x13,

		.reg = SYS_COUNT_RX_CLASSIFIED_DROPS,

	},

	[OCELOT_STAT_RX_RED_PRIO_0] = {

		.name = "rx_red_prio_0",

		.offset = 0x14,

		.reg = SYS_COUNT_RX_RED_PRIO_0,

	},

	[OCELOT_STAT_RX_RED_PRIO_1] = {

		.name = "rx_red_prio_1",

		.offset = 0x15,

		.reg = SYS_COUNT_RX_RED_PRIO_1,

	},

	[OCELOT_STAT_RX_RED_PRIO_2] = {

		.name = "rx_red_prio_2",

		.offset = 0x16,

		.reg = SYS_COUNT_RX_RED_PRIO_2,

	},

	[OCELOT_STAT_RX_RED_PRIO_3] = {

		.name = "rx_red_prio_3",

		.offset = 0x17,

		.reg = SYS_COUNT_RX_RED_PRIO_3,

	},

	[OCELOT_STAT_RX_RED_PRIO_4] = {

		.name = "rx_red_prio_4",

		.offset = 0x18,

		.reg = SYS_COUNT_RX_RED_PRIO_4,

	},

	[OCELOT_STAT_RX_RED_PRIO_5] = {

		.name = "rx_red_prio_5",

		.offset = 0x19,

		.reg = SYS_COUNT_RX_RED_PRIO_5,

	},

	[OCELOT_STAT_RX_RED_PRIO_6] = {

		.name = "rx_red_prio_6",

		.offset = 0x1A,

		.reg = SYS_COUNT_RX_RED_PRIO_6,

	},

	[OCELOT_STAT_RX_RED_PRIO_7] = {

		.name = "rx_red_prio_7",

		.offset = 0x1B,

		.reg = SYS_COUNT_RX_RED_PRIO_7,

	},

	[OCELOT_STAT_RX_YELLOW_PRIO_0] = {

		.name = "rx_yellow_prio_0",

		.offset = 0x1C,

		.reg = SYS_COUNT_RX_YELLOW_PRIO_0,

	},

	[OCELOT_STAT_RX_YELLOW_PRIO_1] = {

		.name = "rx_yellow_prio_1",

		.offset = 0x1D,

		.reg = SYS_COUNT_RX_YELLOW_PRIO_1,

	},

	[OCELOT_STAT_RX_YELLOW_PRIO_2] = {

		.name = "rx_yellow_prio_2",

		.offset = 0x1E,

		.reg = SYS_COUNT_RX_YELLOW_PRIO_2,

	},

	[OCELOT_STAT_RX_YELLOW_PRIO_3] = {

		.name = "rx_yellow_prio_3",

		.offset = 0x1F,

		.reg = SYS_COUNT_RX_YELLOW_PRIO_3,

	},

	[OCELOT_STAT_RX_YELLOW_PRIO_4] = {

		.name = "rx_yellow_prio_4",

		.offset = 0x20,

		.reg = SYS_COUNT_RX_YELLOW_PRIO_4,

	},

	[OCELOT_STAT_RX_YELLOW_PRIO_5] = {

		.name = "rx_yellow_prio_5",

		.offset = 0x21,

		.reg = SYS_COUNT_RX_YELLOW_PRIO_5,

	},

	[OCELOT_STAT_RX_YELLOW_PRIO_6] = {

		.name = "rx_yellow_prio_6",

		.offset = 0x22,

		.reg = SYS_COUNT_RX_YELLOW_PRIO_6,

	},

	[OCELOT_STAT_RX_YELLOW_PRIO_7] = {

		.name = "rx_yellow_prio_7",

		.offset = 0x23,

		.reg = SYS_COUNT_RX_YELLOW_PRIO_7,

	},

	[OCELOT_STAT_RX_GREEN_PRIO_0] = {

		.name = "rx_green_prio_0",

		.offset = 0x24,

		.reg = SYS_COUNT_RX_GREEN_PRIO_0,

	},

	[OCELOT_STAT_RX_GREEN_PRIO_1] = {

		.name = "rx_green_prio_1",

		.offset = 0x25,

		.reg = SYS_COUNT_RX_GREEN_PRIO_1,

	},

	[OCELOT_STAT_RX_GREEN_PRIO_2] = {

		.name = "rx_green_prio_2",

		.offset = 0x26,

		.reg = SYS_COUNT_RX_GREEN_PRIO_2,

	},

	[OCELOT_STAT_RX_GREEN_PRIO_3] = {

		.name = "rx_green_prio_3",

		.offset = 0x27,

		.reg = SYS_COUNT_RX_GREEN_PRIO_3,

	},

	[OCELOT_STAT_RX_GREEN_PRIO_4] = {

		.name = "rx_green_prio_4",

		.offset = 0x28,

		.reg = SYS_COUNT_RX_GREEN_PRIO_4,

	},

	[OCELOT_STAT_RX_GREEN_PRIO_5] = {

		.name = "rx_green_prio_5",

		.offset = 0x29,

		.reg = SYS_COUNT_RX_GREEN_PRIO_5,

	},

	[OCELOT_STAT_RX_GREEN_PRIO_6] = {

		.name = "rx_green_prio_6",

		.offset = 0x2A,

		.reg = SYS_COUNT_RX_GREEN_PRIO_6,

	},

	[OCELOT_STAT_RX_GREEN_PRIO_7] = {

		.name = "rx_green_prio_7",

		.offset = 0x2B,

		.reg = SYS_COUNT_RX_GREEN_PRIO_7,

	},

	[OCELOT_STAT_TX_OCTETS] = {

		.name = "tx_octets",

		.offset = 0x80,

		.reg = SYS_COUNT_TX_OCTETS,

	},

	[OCELOT_STAT_TX_UNICAST] = {

		.name = "tx_unicast",

		.offset = 0x81,

		.reg = SYS_COUNT_TX_UNICAST,

	},

	[OCELOT_STAT_TX_MULTICAST] = {

		.name = "tx_multicast",

		.offset = 0x82,

		.reg = SYS_COUNT_TX_MULTICAST,

	},

	[OCELOT_STAT_TX_BROADCAST] = {

		.name = "tx_broadcast",

		.offset = 0x83,

		.reg = SYS_COUNT_TX_BROADCAST,

	},

	[OCELOT_STAT_TX_COLLISION] = {

		.name = "tx_collision",

		.offset = 0x84,

		.reg = SYS_COUNT_TX_COLLISION,

	},

	[OCELOT_STAT_TX_DROPS] = {

		.name = "tx_drops",

		.offset = 0x85,

		.reg = SYS_COUNT_TX_DROPS,

	},

	[OCELOT_STAT_TX_PAUSE] = {

		.name = "tx_pause",

		.offset = 0x86,

		.reg = SYS_COUNT_TX_PAUSE,

	},

	[OCELOT_STAT_TX_64] = {

		.name = "tx_frames_below_65_octets",

		.offset = 0x87,

		.reg = SYS_COUNT_TX_64,

	},

	[OCELOT_STAT_TX_65_127] = {

		.name = "tx_frames_65_to_127_octets",

		.offset = 0x88,

		.reg = SYS_COUNT_TX_65_127,

	},

	[OCELOT_STAT_TX_128_255] = {

		.name = "tx_frames_128_255_octets",

		.offset = 0x89,

		.reg = SYS_COUNT_TX_128_255,

	},

	[OCELOT_STAT_TX_256_511] = {

		.name = "tx_frames_256_511_octets",

		.offset = 0x8A,

		.reg = SYS_COUNT_TX_256_511,

	},

	[OCELOT_STAT_TX_512_1023] = {

		.name = "tx_frames_512_1023_octets",

		.offset = 0x8B,

		.reg = SYS_COUNT_TX_512_1023,

	},

	[OCELOT_STAT_TX_1024_1526] = {

		.name = "tx_frames_1024_1526_octets",

		.offset = 0x8C,

		.reg = SYS_COUNT_TX_1024_1526,

	},

	[OCELOT_STAT_TX_1527_MAX] = {

		.name = "tx_frames_over_1526_octets",

		.offset = 0x8D,

		.reg = SYS_COUNT_TX_1527_MAX,

	},

	[OCELOT_STAT_TX_YELLOW_PRIO_0] = {

		.name = "tx_yellow_prio_0",

		.offset = 0x8E,

		.reg = SYS_COUNT_TX_YELLOW_PRIO_0,

	},

	[OCELOT_STAT_TX_YELLOW_PRIO_1] = {

		.name = "tx_yellow_prio_1",

		.offset = 0x8F,

		.reg = SYS_COUNT_TX_YELLOW_PRIO_1,

	},

	[OCELOT_STAT_TX_YELLOW_PRIO_2] = {

		.name = "tx_yellow_prio_2",

		.offset = 0x90,

		.reg = SYS_COUNT_TX_YELLOW_PRIO_2,

	},

	[OCELOT_STAT_TX_YELLOW_PRIO_3] = {

		.name = "tx_yellow_prio_3",

		.offset = 0x91,

		.reg = SYS_COUNT_TX_YELLOW_PRIO_3,

	},

	[OCELOT_STAT_TX_YELLOW_PRIO_4] = {

		.name = "tx_yellow_prio_4",

		.offset = 0x92,

		.reg = SYS_COUNT_TX_YELLOW_PRIO_4,

	},

	[OCELOT_STAT_TX_YELLOW_PRIO_5] = {

		.name = "tx_yellow_prio_5",

		.offset = 0x93,

		.reg = SYS_COUNT_TX_YELLOW_PRIO_5,

	},

	[OCELOT_STAT_TX_YELLOW_PRIO_6] = {

		.name = "tx_yellow_prio_6",

		.offset = 0x94,

		.reg = SYS_COUNT_TX_YELLOW_PRIO_6,

	},

	[OCELOT_STAT_TX_YELLOW_PRIO_7] = {

		.name = "tx_yellow_prio_7",

		.offset = 0x95,

		.reg = SYS_COUNT_TX_YELLOW_PRIO_7,

	},

	[OCELOT_STAT_TX_GREEN_PRIO_0] = {

		.name = "tx_green_prio_0",

		.offset = 0x96,

		.reg = SYS_COUNT_TX_GREEN_PRIO_0,

	},

	[OCELOT_STAT_TX_GREEN_PRIO_1] = {

		.name = "tx_green_prio_1",

		.offset = 0x97,

		.reg = SYS_COUNT_TX_GREEN_PRIO_1,

	},

	[OCELOT_STAT_TX_GREEN_PRIO_2] = {

		.name = "tx_green_prio_2",

		.offset = 0x98,

		.reg = SYS_COUNT_TX_GREEN_PRIO_2,

	},

	[OCELOT_STAT_TX_GREEN_PRIO_3] = {

		.name = "tx_green_prio_3",

		.offset = 0x99,

		.reg = SYS_COUNT_TX_GREEN_PRIO_3,

	},

	[OCELOT_STAT_TX_GREEN_PRIO_4] = {

		.name = "tx_green_prio_4",

		.offset = 0x9A,

		.reg = SYS_COUNT_TX_GREEN_PRIO_4,

	},

	[OCELOT_STAT_TX_GREEN_PRIO_5] = {

		.name = "tx_green_prio_5",

		.offset = 0x9B,

		.reg = SYS_COUNT_TX_GREEN_PRIO_5,

	},

	[OCELOT_STAT_TX_GREEN_PRIO_6] = {

		.name = "tx_green_prio_6",

		.offset = 0x9C,

		.reg = SYS_COUNT_TX_GREEN_PRIO_6,

	},

	[OCELOT_STAT_TX_GREEN_PRIO_7] = {

		.name = "tx_green_prio_7",

		.offset = 0x9D,

		.reg = SYS_COUNT_TX_GREEN_PRIO_7,

	},

	[OCELOT_STAT_TX_AGED] = {

		.name = "tx_aged",

		.offset = 0x9E,

		.reg = SYS_COUNT_TX_AGING,

	},

	[OCELOT_STAT_DROP_LOCAL] = {

		.name = "drop_local",

		.offset = 0x100,

		.reg = SYS_COUNT_DROP_LOCAL,

	},

	[OCELOT_STAT_DROP_TAIL] = {

		.name = "drop_tail",

		.offset = 0x101,

		.reg = SYS_COUNT_DROP_TAIL,

	},

	[OCELOT_STAT_DROP_YELLOW_PRIO_0] = {

		.name = "drop_yellow_prio_0",

		.offset = 0x102,

		.reg = SYS_COUNT_DROP_YELLOW_PRIO_0,

	},

	[OCELOT_STAT_DROP_YELLOW_PRIO_1] = {

		.name = "drop_yellow_prio_1",

		.offset = 0x103,

		.reg = SYS_COUNT_DROP_YELLOW_PRIO_1,

	},

	[OCELOT_STAT_DROP_YELLOW_PRIO_2] = {

		.name = "drop_yellow_prio_2",

		.offset = 0x104,

		.reg = SYS_COUNT_DROP_YELLOW_PRIO_2,

	},

	[OCELOT_STAT_DROP_YELLOW_PRIO_3] = {

		.name = "drop_yellow_prio_3",

		.offset = 0x105,

		.reg = SYS_COUNT_DROP_YELLOW_PRIO_3,

	},

	[OCELOT_STAT_DROP_YELLOW_PRIO_4] = {

		.name = "drop_yellow_prio_4",

		.offset = 0x106,

		.reg = SYS_COUNT_DROP_YELLOW_PRIO_4,

	},

	[OCELOT_STAT_DROP_YELLOW_PRIO_5] = {

		.name = "drop_yellow_prio_5",

		.offset = 0x107,

		.reg = SYS_COUNT_DROP_YELLOW_PRIO_5,

	},

	[OCELOT_STAT_DROP_YELLOW_PRIO_6] = {

		.name = "drop_yellow_prio_6",

		.offset = 0x108,

		.reg = SYS_COUNT_DROP_YELLOW_PRIO_6,

	},

	[OCELOT_STAT_DROP_YELLOW_PRIO_7] = {

		.name = "drop_yellow_prio_7",

		.offset = 0x109,

		.reg = SYS_COUNT_DROP_YELLOW_PRIO_7,

	},

	[OCELOT_STAT_DROP_GREEN_PRIO_0] = {

		.name = "drop_green_prio_0",

		.offset = 0x10A,

		.reg = SYS_COUNT_DROP_GREEN_PRIO_0,

	},

	[OCELOT_STAT_DROP_GREEN_PRIO_1] = {

		.name = "drop_green_prio_1",

		.offset = 0x10B,

		.reg = SYS_COUNT_DROP_GREEN_PRIO_1,

	},

	[OCELOT_STAT_DROP_GREEN_PRIO_2] = {

		.name = "drop_green_prio_2",

		.offset = 0x10C,

		.reg = SYS_COUNT_DROP_GREEN_PRIO_2,

	},

	[OCELOT_STAT_DROP_GREEN_PRIO_3] = {

		.name = "drop_green_prio_3",

		.offset = 0x10D,

		.reg = SYS_COUNT_DROP_GREEN_PRIO_3,

	},

	[OCELOT_STAT_DROP_GREEN_PRIO_4] = {

		.name = "drop_green_prio_4",

		.offset = 0x10E,

		.reg = SYS_COUNT_DROP_GREEN_PRIO_4,

	},

	[OCELOT_STAT_DROP_GREEN_PRIO_5] = {

		.name = "drop_green_prio_5",

		.offset = 0x10F,

		.reg = SYS_COUNT_DROP_GREEN_PRIO_5,

	},

	[OCELOT_STAT_DROP_GREEN_PRIO_6] = {

		.name = "drop_green_prio_6",

		.offset = 0x110,

		.reg = SYS_COUNT_DROP_GREEN_PRIO_6,

	},

	[OCELOT_STAT_DROP_GREEN_PRIO_7] = {

		.name = "drop_green_prio_7",

		.offset = 0x111,

		.reg = SYS_COUNT_DROP_GREEN_PRIO_7,

	},

};

drivers/net/dsa/ocelot/seville_vsc9953.c

+162 −93

File changed.

Preview size limit exceeded, changes collapsed.

drivers/net/ethernet/mscc/ocelot.c

+5 −6
Original line number Diff line number Diff line
@@ -1881,8 +1881,7 @@ static int ocelot_port_update_stats(struct ocelot *ocelot, int port) 
	ocelot_write(ocelot, SYS_STAT_CFG_STAT_VIEW(port), SYS_STAT_CFG);



	list_for_each_entry(region, &ocelot->stats_regions, node) {

		err = ocelot_bulk_read_rix(ocelot, SYS_COUNT_RX_OCTETS,

					   region->offset, region->buf,

		err = ocelot_bulk_read(ocelot, region->base, region->buf,

				       region->count);

		if (err)

			return err;
@@ -1978,7 +1977,7 @@ static int ocelot_prepare_stats_regions(struct ocelot *ocelot) 
		if (ocelot->stats_layout[i].name[0] == '\0')

			continue;



		if (region && ocelot->stats_layout[i].offset == last + 1) {

		if (region && ocelot->stats_layout[i].reg == last + 4) {

			region->count++;

		} else {

			region = devm_kzalloc(ocelot->dev, sizeof(*region),
@@ -1986,12 +1985,12 @@ static int ocelot_prepare_stats_regions(struct ocelot *ocelot) 
			if (!region)

				return -ENOMEM;



			region->offset = ocelot->stats_layout[i].offset;

			region->base = ocelot->stats_layout[i].reg;

			region->count = 1;

			list_add_tail(&region->node, &ocelot->stats_regions);

		}



		last = ocelot->stats_layout[i].offset;

		last = ocelot->stats_layout[i].reg;

	}



	list_for_each_entry(region, &ocelot->stats_regions, node) {

drivers/net/ethernet/mscc/ocelot_vsc7514.c

+93 −93

File changed.

Preview size limit exceeded, changes collapsed.

drivers/net/ethernet/mscc/vsc7514_regs.c

+58 −0
Original line number Diff line number Diff line
@@ -188,6 +188,30 @@ const u32 vsc7514_sys_regmap[] = { 
	REG(SYS_COUNT_RX_CONTROL,			0x000044),

	REG(SYS_COUNT_RX_LONGS,				0x000048),

	REG(SYS_COUNT_RX_CLASSIFIED_DROPS,		0x00004c),

	REG(SYS_COUNT_RX_RED_PRIO_0,			0x000050),

	REG(SYS_COUNT_RX_RED_PRIO_1,			0x000054),

	REG(SYS_COUNT_RX_RED_PRIO_2,			0x000058),

	REG(SYS_COUNT_RX_RED_PRIO_3,			0x00005c),

	REG(SYS_COUNT_RX_RED_PRIO_4,			0x000060),

	REG(SYS_COUNT_RX_RED_PRIO_5,			0x000064),

	REG(SYS_COUNT_RX_RED_PRIO_6,			0x000068),

	REG(SYS_COUNT_RX_RED_PRIO_7,			0x00006c),

	REG(SYS_COUNT_RX_YELLOW_PRIO_0,			0x000070),

	REG(SYS_COUNT_RX_YELLOW_PRIO_1,			0x000074),

	REG(SYS_COUNT_RX_YELLOW_PRIO_2,			0x000078),

	REG(SYS_COUNT_RX_YELLOW_PRIO_3,			0x00007c),

	REG(SYS_COUNT_RX_YELLOW_PRIO_4,			0x000080),

	REG(SYS_COUNT_RX_YELLOW_PRIO_5,			0x000084),

	REG(SYS_COUNT_RX_YELLOW_PRIO_6,			0x000088),

	REG(SYS_COUNT_RX_YELLOW_PRIO_7,			0x00008c),

	REG(SYS_COUNT_RX_GREEN_PRIO_0,			0x000090),

	REG(SYS_COUNT_RX_GREEN_PRIO_1,			0x000094),

	REG(SYS_COUNT_RX_GREEN_PRIO_2,			0x000098),

	REG(SYS_COUNT_RX_GREEN_PRIO_3,			0x00009c),

	REG(SYS_COUNT_RX_GREEN_PRIO_4,			0x0000a0),

	REG(SYS_COUNT_RX_GREEN_PRIO_5,			0x0000a4),

	REG(SYS_COUNT_RX_GREEN_PRIO_6,			0x0000a8),

	REG(SYS_COUNT_RX_GREEN_PRIO_7,			0x0000ac),

	REG(SYS_COUNT_TX_OCTETS,			0x000100),

	REG(SYS_COUNT_TX_UNICAST,			0x000104),

	REG(SYS_COUNT_TX_MULTICAST,			0x000108),
@@ -202,7 +226,41 @@ const u32 vsc7514_sys_regmap[] = { 
	REG(SYS_COUNT_TX_512_1023,			0x00012c),

	REG(SYS_COUNT_TX_1024_1526,			0x000130),

	REG(SYS_COUNT_TX_1527_MAX,			0x000134),

	REG(SYS_COUNT_TX_YELLOW_PRIO_0,			0x000138),

	REG(SYS_COUNT_TX_YELLOW_PRIO_1,			0x00013c),

	REG(SYS_COUNT_TX_YELLOW_PRIO_2,			0x000140),

	REG(SYS_COUNT_TX_YELLOW_PRIO_3,			0x000144),

	REG(SYS_COUNT_TX_YELLOW_PRIO_4,			0x000148),

	REG(SYS_COUNT_TX_YELLOW_PRIO_5,			0x00014c),

	REG(SYS_COUNT_TX_YELLOW_PRIO_6,			0x000150),

	REG(SYS_COUNT_TX_YELLOW_PRIO_7,			0x000154),

	REG(SYS_COUNT_TX_GREEN_PRIO_0,			0x000158),

	REG(SYS_COUNT_TX_GREEN_PRIO_1,			0x00015c),

	REG(SYS_COUNT_TX_GREEN_PRIO_2,			0x000160),

	REG(SYS_COUNT_TX_GREEN_PRIO_3,			0x000164),

	REG(SYS_COUNT_TX_GREEN_PRIO_4,			0x000168),

	REG(SYS_COUNT_TX_GREEN_PRIO_5,			0x00016c),

	REG(SYS_COUNT_TX_GREEN_PRIO_6,			0x000170),

	REG(SYS_COUNT_TX_GREEN_PRIO_7,			0x000174),

	REG(SYS_COUNT_TX_AGING,				0x000178),

	REG(SYS_COUNT_DROP_LOCAL,			0x000200),

	REG(SYS_COUNT_DROP_TAIL,			0x000204),

	REG(SYS_COUNT_DROP_YELLOW_PRIO_0,		0x000208),

	REG(SYS_COUNT_DROP_YELLOW_PRIO_1,		0x00020c),

	REG(SYS_COUNT_DROP_YELLOW_PRIO_2,		0x000210),

	REG(SYS_COUNT_DROP_YELLOW_PRIO_3,		0x000214),

	REG(SYS_COUNT_DROP_YELLOW_PRIO_4,		0x000218),

	REG(SYS_COUNT_DROP_YELLOW_PRIO_5,		0x00021c),

	REG(SYS_COUNT_DROP_YELLOW_PRIO_6,		0x000220),

	REG(SYS_COUNT_DROP_YELLOW_PRIO_7,		0x000214),

	REG(SYS_COUNT_DROP_GREEN_PRIO_0,		0x000218),

	REG(SYS_COUNT_DROP_GREEN_PRIO_1,		0x00021c),

	REG(SYS_COUNT_DROP_GREEN_PRIO_2,		0x000220),

	REG(SYS_COUNT_DROP_GREEN_PRIO_3,		0x000224),

	REG(SYS_COUNT_DROP_GREEN_PRIO_4,		0x000228),

	REG(SYS_COUNT_DROP_GREEN_PRIO_5,		0x00022c),

	REG(SYS_COUNT_DROP_GREEN_PRIO_6,		0x000230),

	REG(SYS_COUNT_DROP_GREEN_PRIO_7,		0x000234),

	REG(SYS_RESET_CFG,				0x000508),

	REG(SYS_CMID,					0x00050c),

	REG(SYS_VLAN_ETYPE_CFG,				0x000510),