Loading drivers/gpu/drm/i915/i915_drv.c +15 −14 Original line number Diff line number Diff line Loading @@ -673,7 +673,7 @@ int i915_resume(struct drm_device *dev) return 0; } static int i8xx_do_reset(struct drm_device *dev, u8 flags) static int i8xx_do_reset(struct drm_device *dev) { struct drm_i915_private *dev_priv = dev->dev_private; Loading Loading @@ -710,7 +710,7 @@ static int i965_reset_complete(struct drm_device *dev) return gdrst & 0x1; } static int i965_do_reset(struct drm_device *dev, u8 flags) static int i965_do_reset(struct drm_device *dev) { u8 gdrst; Loading @@ -720,20 +720,22 @@ static int i965_do_reset(struct drm_device *dev, u8 flags) * triggers the reset; when done, the hardware will clear it. */ pci_read_config_byte(dev->pdev, I965_GDRST, &gdrst); pci_write_config_byte(dev->pdev, I965_GDRST, gdrst | flags | 0x1); pci_write_config_byte(dev->pdev, I965_GDRST, gdrst | GRDOM_RENDER | 0x1); return wait_for(i965_reset_complete(dev), 500); } static int ironlake_do_reset(struct drm_device *dev, u8 flags) static int ironlake_do_reset(struct drm_device *dev) { struct drm_i915_private *dev_priv = dev->dev_private; u32 gdrst = I915_READ(MCHBAR_MIRROR_BASE + ILK_GDSR); I915_WRITE(MCHBAR_MIRROR_BASE + ILK_GDSR, gdrst | flags | 0x1); I915_WRITE(MCHBAR_MIRROR_BASE + ILK_GDSR, gdrst | GRDOM_RENDER | 0x1); return wait_for(I915_READ(MCHBAR_MIRROR_BASE + ILK_GDSR) & 0x1, 500); } static int gen6_do_reset(struct drm_device *dev, u8 flags) static int gen6_do_reset(struct drm_device *dev) { struct drm_i915_private *dev_priv = dev->dev_private; int ret; Loading Loading @@ -768,7 +770,7 @@ static int gen6_do_reset(struct drm_device *dev, u8 flags) return ret; } static int intel_gpu_reset(struct drm_device *dev, u8 flags) static int intel_gpu_reset(struct drm_device *dev) { struct drm_i915_private *dev_priv = dev->dev_private; int ret = -ENODEV; Loading @@ -776,16 +778,16 @@ static int intel_gpu_reset(struct drm_device *dev, u8 flags) switch (INTEL_INFO(dev)->gen) { case 7: case 6: ret = gen6_do_reset(dev, flags); ret = gen6_do_reset(dev); break; case 5: ret = ironlake_do_reset(dev, flags); ret = ironlake_do_reset(dev); break; case 4: ret = i965_do_reset(dev, flags); ret = i965_do_reset(dev); break; case 2: ret = i8xx_do_reset(dev, flags); ret = i8xx_do_reset(dev); break; } Loading @@ -806,7 +808,6 @@ static int intel_gpu_reset(struct drm_device *dev, u8 flags) /** * i915_reset - reset chip after a hang * @dev: drm device to reset * @flags: reset domains * * Reset the chip. Useful if a hang is detected. Returns zero on successful * reset or otherwise an error code. Loading @@ -819,7 +820,7 @@ static int intel_gpu_reset(struct drm_device *dev, u8 flags) * - re-init interrupt state * - re-init display */ int i915_reset(struct drm_device *dev, u8 flags) int i915_reset(struct drm_device *dev) { drm_i915_private_t *dev_priv = dev->dev_private; int ret; Loading @@ -838,7 +839,7 @@ int i915_reset(struct drm_device *dev, u8 flags) if (get_seconds() - dev_priv->last_gpu_reset < 5) DRM_ERROR("GPU hanging too fast, declaring wedged!\n"); else ret = intel_gpu_reset(dev, flags); ret = intel_gpu_reset(dev); dev_priv->last_gpu_reset = get_seconds(); if (ret) { Loading drivers/gpu/drm/i915/i915_drv.h +1 −1 Original line number Diff line number Diff line Loading @@ -1153,7 +1153,7 @@ extern long i915_compat_ioctl(struct file *filp, unsigned int cmd, extern int i915_emit_box(struct drm_device *dev, struct drm_clip_rect *box, int DR1, int DR4); extern int i915_reset(struct drm_device *dev, u8 flags); extern int i915_reset(struct drm_device *dev); extern unsigned long i915_chipset_val(struct drm_i915_private *dev_priv); extern unsigned long i915_mch_val(struct drm_i915_private *dev_priv); extern unsigned long i915_gfx_val(struct drm_i915_private *dev_priv); Loading drivers/gpu/drm/i915/i915_irq.c +1 −1 Original line number Diff line number Diff line Loading @@ -758,7 +758,7 @@ static void i915_error_work_func(struct work_struct *work) if (atomic_read(&dev_priv->mm.wedged)) { DRM_DEBUG_DRIVER("resetting chip\n"); kobject_uevent_env(&dev->primary->kdev.kobj, KOBJ_CHANGE, reset_event); if (!i915_reset(dev, GRDOM_RENDER)) { if (!i915_reset(dev)) { atomic_set(&dev_priv->mm.wedged, 0); kobject_uevent_env(&dev->primary->kdev.kobj, KOBJ_CHANGE, reset_done_event); } Loading Loading
drivers/gpu/drm/i915/i915_drv.c +15 −14 Original line number Diff line number Diff line Loading @@ -673,7 +673,7 @@ int i915_resume(struct drm_device *dev) return 0; } static int i8xx_do_reset(struct drm_device *dev, u8 flags) static int i8xx_do_reset(struct drm_device *dev) { struct drm_i915_private *dev_priv = dev->dev_private; Loading Loading @@ -710,7 +710,7 @@ static int i965_reset_complete(struct drm_device *dev) return gdrst & 0x1; } static int i965_do_reset(struct drm_device *dev, u8 flags) static int i965_do_reset(struct drm_device *dev) { u8 gdrst; Loading @@ -720,20 +720,22 @@ static int i965_do_reset(struct drm_device *dev, u8 flags) * triggers the reset; when done, the hardware will clear it. */ pci_read_config_byte(dev->pdev, I965_GDRST, &gdrst); pci_write_config_byte(dev->pdev, I965_GDRST, gdrst | flags | 0x1); pci_write_config_byte(dev->pdev, I965_GDRST, gdrst | GRDOM_RENDER | 0x1); return wait_for(i965_reset_complete(dev), 500); } static int ironlake_do_reset(struct drm_device *dev, u8 flags) static int ironlake_do_reset(struct drm_device *dev) { struct drm_i915_private *dev_priv = dev->dev_private; u32 gdrst = I915_READ(MCHBAR_MIRROR_BASE + ILK_GDSR); I915_WRITE(MCHBAR_MIRROR_BASE + ILK_GDSR, gdrst | flags | 0x1); I915_WRITE(MCHBAR_MIRROR_BASE + ILK_GDSR, gdrst | GRDOM_RENDER | 0x1); return wait_for(I915_READ(MCHBAR_MIRROR_BASE + ILK_GDSR) & 0x1, 500); } static int gen6_do_reset(struct drm_device *dev, u8 flags) static int gen6_do_reset(struct drm_device *dev) { struct drm_i915_private *dev_priv = dev->dev_private; int ret; Loading Loading @@ -768,7 +770,7 @@ static int gen6_do_reset(struct drm_device *dev, u8 flags) return ret; } static int intel_gpu_reset(struct drm_device *dev, u8 flags) static int intel_gpu_reset(struct drm_device *dev) { struct drm_i915_private *dev_priv = dev->dev_private; int ret = -ENODEV; Loading @@ -776,16 +778,16 @@ static int intel_gpu_reset(struct drm_device *dev, u8 flags) switch (INTEL_INFO(dev)->gen) { case 7: case 6: ret = gen6_do_reset(dev, flags); ret = gen6_do_reset(dev); break; case 5: ret = ironlake_do_reset(dev, flags); ret = ironlake_do_reset(dev); break; case 4: ret = i965_do_reset(dev, flags); ret = i965_do_reset(dev); break; case 2: ret = i8xx_do_reset(dev, flags); ret = i8xx_do_reset(dev); break; } Loading @@ -806,7 +808,6 @@ static int intel_gpu_reset(struct drm_device *dev, u8 flags) /** * i915_reset - reset chip after a hang * @dev: drm device to reset * @flags: reset domains * * Reset the chip. Useful if a hang is detected. Returns zero on successful * reset or otherwise an error code. Loading @@ -819,7 +820,7 @@ static int intel_gpu_reset(struct drm_device *dev, u8 flags) * - re-init interrupt state * - re-init display */ int i915_reset(struct drm_device *dev, u8 flags) int i915_reset(struct drm_device *dev) { drm_i915_private_t *dev_priv = dev->dev_private; int ret; Loading @@ -838,7 +839,7 @@ int i915_reset(struct drm_device *dev, u8 flags) if (get_seconds() - dev_priv->last_gpu_reset < 5) DRM_ERROR("GPU hanging too fast, declaring wedged!\n"); else ret = intel_gpu_reset(dev, flags); ret = intel_gpu_reset(dev); dev_priv->last_gpu_reset = get_seconds(); if (ret) { Loading
drivers/gpu/drm/i915/i915_drv.h +1 −1 Original line number Diff line number Diff line Loading @@ -1153,7 +1153,7 @@ extern long i915_compat_ioctl(struct file *filp, unsigned int cmd, extern int i915_emit_box(struct drm_device *dev, struct drm_clip_rect *box, int DR1, int DR4); extern int i915_reset(struct drm_device *dev, u8 flags); extern int i915_reset(struct drm_device *dev); extern unsigned long i915_chipset_val(struct drm_i915_private *dev_priv); extern unsigned long i915_mch_val(struct drm_i915_private *dev_priv); extern unsigned long i915_gfx_val(struct drm_i915_private *dev_priv); Loading
drivers/gpu/drm/i915/i915_irq.c +1 −1 Original line number Diff line number Diff line Loading @@ -758,7 +758,7 @@ static void i915_error_work_func(struct work_struct *work) if (atomic_read(&dev_priv->mm.wedged)) { DRM_DEBUG_DRIVER("resetting chip\n"); kobject_uevent_env(&dev->primary->kdev.kobj, KOBJ_CHANGE, reset_event); if (!i915_reset(dev, GRDOM_RENDER)) { if (!i915_reset(dev)) { atomic_set(&dev_priv->mm.wedged, 0); kobject_uevent_env(&dev->primary->kdev.kobj, KOBJ_CHANGE, reset_done_event); } Loading