Commit d4b6f156 authored by Huacai Chen's avatar Huacai Chen
Browse files

LoongArch: Add Non-Uniform Memory Access (NUMA) support 



Add Non-Uniform Memory Access (NUMA) support for LoongArch. LoongArch
has 48-bit physical address, but the HyperTransport I/O bus only support
40-bit address, so we need a custom phys_to_dma() and dma_to_phys() to
extract the 4-bit node id (bit 44~47) from Loongson-3's 48-bit physical
address space and embed it into 40-bit. In the 40-bit dma address, node
id offset can be read from the LS7A_DMA_CFG register.

Reviewed-by: default avatarWANG Xuerui <git@xen0n.name>
Reviewed-by: default avatarJiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: default avatarHuacai Chen <chenhuacai@loongson.cn>
parent 46859ac8

arch/loongarch/Kconfig

+21 −0
Original line number Diff line number Diff line
@@ -7,6 +7,7 @@ config LOONGARCH 
	select ARCH_ENABLE_MEMORY_HOTPLUG

	select ARCH_ENABLE_MEMORY_HOTREMOVE

	select ARCH_HAS_ACPI_TABLE_UPGRADE	if ACPI

	select ARCH_HAS_PHYS_TO_DMA

	select ARCH_HAS_PTE_SPECIAL

	select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST

	select ARCH_INLINE_READ_LOCK if !PREEMPTION
@@ -41,6 +42,7 @@ config LOONGARCH 
	select ARCH_SUPPORTS_ACPI

	select ARCH_SUPPORTS_ATOMIC_RMW

	select ARCH_SUPPORTS_HUGETLBFS

	select ARCH_SUPPORTS_NUMA_BALANCING

	select ARCH_USE_BUILTIN_BSWAP

	select ARCH_USE_CMPXCHG_LOCKREF

	select ARCH_USE_QUEUED_RWLOCKS
@@ -91,12 +93,15 @@ config LOONGARCH 
	select HAVE_PERF_EVENTS

	select HAVE_REGS_AND_STACK_ACCESS_API

	select HAVE_RSEQ

	select HAVE_SETUP_PER_CPU_AREA if NUMA

	select HAVE_SYSCALL_TRACEPOINTS

	select HAVE_TIF_NOHZ

	select HAVE_VIRT_CPU_ACCOUNTING_GEN if !SMP

	select IRQ_FORCED_THREADING

	select IRQ_LOONGARCH_CPU

	select MODULES_USE_ELF_RELA if MODULES

	select NEED_PER_CPU_EMBED_FIRST_CHUNK

	select NEED_PER_CPU_PAGE_FIRST_CHUNK

	select OF

	select OF_EARLY_FLATTREE

	select PERF_USE_VMALLOC
@@ -105,6 +110,7 @@ config LOONGARCH 
	select SYSCTL_EXCEPTION_TRACE

	select SWIOTLB

	select TRACE_IRQFLAGS_SUPPORT

	select USE_PERCPU_NUMA_NODE_ID

	select ZONE_DMA32



config 32BIT
@@ -335,6 +341,20 @@ config NR_CPUS 
	  This allows you to specify the maximum number of CPUs which this

	  kernel will support.



config NUMA

	bool "NUMA Support"

	select ACPI_NUMA if ACPI

	help

	  Say Y to compile the kernel with NUMA (Non-Uniform Memory Access)

	  support.  This option improves performance on systems with more

	  than one NUMA node; on single node systems it is generally better

	  to leave it disabled.



config NODES_SHIFT

	int

	default "6"

	depends on NUMA



config FORCE_MAX_ZONEORDER

	int "Maximum zone order"

	range 14 64 if PAGE_SIZE_64KB
@@ -381,6 +401,7 @@ config ARCH_SELECT_MEMORY_MODEL 


config ARCH_FLATMEM_ENABLE

	def_bool y

	depends on !NUMA



config ARCH_SPARSEMEM_ENABLE

	def_bool y

arch/loongarch/include/asm/bootinfo.h

+2 −0
Original line number Diff line number Diff line
@@ -13,6 +13,8 @@ const char *get_system_type(void); 
extern void init_environ(void);

extern void memblock_init(void);

extern void platform_init(void);

extern void plat_swiotlb_setup(void);

extern int __init init_numa_memory(void);



struct loongson_board_info {

	int bios_size;

arch/loongarch/include/asm/dma-direct.h

0 → 100644
+11 −0
Original line number Diff line number Diff line 
/* SPDX-License-Identifier: GPL-2.0 */

/*

 * Copyright (C) 2020-2022 Loongson Technology Corporation Limited

 */

#ifndef _LOONGARCH_DMA_DIRECT_H

#define _LOONGARCH_DMA_DIRECT_H



dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr);

phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr);



#endif /* _LOONGARCH_DMA_DIRECT_H */

arch/loongarch/include/asm/mmzone.h

0 → 100644
+18 −0
Original line number Diff line number Diff line 
/* SPDX-License-Identifier: GPL-2.0 */

/*

 * Author: Huacai Chen (chenhuacai@loongson.cn)

 * Copyright (C) 2020-2022 Loongson Technology Corporation Limited

 */

#ifndef _ASM_MMZONE_H_

#define _ASM_MMZONE_H_



#include <asm/page.h>

#include <asm/numa.h>



extern struct pglist_data *node_data[];



#define NODE_DATA(nid)	(node_data[(nid)])



extern void setup_zero_pages(void);



#endif /* _ASM_MMZONE_H_ */

arch/loongarch/include/asm/numa.h

0 → 100644
+67 −0
Original line number Diff line number Diff line 
/* SPDX-License-Identifier: GPL-2.0 */

/*

 * Author: Jianmin Lv <lvjianmin@loongson.cn>

 *         Huacai Chen <chenhuacai@loongson.cn>

 *

 * Copyright (C) 2020-2022 Loongson Technology Corporation Limited

 */



#ifndef _ASM_LOONGARCH_NUMA_H

#define _ASM_LOONGARCH_NUMA_H



#include <linux/nodemask.h>



#define NODE_ADDRSPACE_SHIFT 44



#define pa_to_nid(addr)		(((addr) & 0xf00000000000) >> NODE_ADDRSPACE_SHIFT)

#define nid_to_addrbase(nid)	(_ULCAST_(nid) << NODE_ADDRSPACE_SHIFT)



#ifdef CONFIG_NUMA



extern int numa_off;

extern s16 __cpuid_to_node[CONFIG_NR_CPUS];

extern nodemask_t numa_nodes_parsed __initdata;



struct numa_memblk {

	u64			start;

	u64			end;

	int			nid;

};



#define NR_NODE_MEMBLKS		(MAX_NUMNODES*2)

struct numa_meminfo {

	int			nr_blks;

	struct numa_memblk	blk[NR_NODE_MEMBLKS];

};



extern int __init numa_add_memblk(int nodeid, u64 start, u64 end);



extern void __init early_numa_add_cpu(int cpuid, s16 node);

extern void numa_add_cpu(unsigned int cpu);

extern void numa_remove_cpu(unsigned int cpu);



static inline void numa_clear_node(int cpu)

{

}



static inline void set_cpuid_to_node(int cpuid, s16 node)

{

	__cpuid_to_node[cpuid] = node;

}



extern int early_cpu_to_node(int cpu);



#else



static inline void early_numa_add_cpu(int cpuid, s16 node)	{ }

static inline void numa_add_cpu(unsigned int cpu)		{ }

static inline void numa_remove_cpu(unsigned int cpu)		{ }



static inline int early_cpu_to_node(int cpu)

{

	return 0;

}



#endif	/* CONFIG_NUMA */



#endif	/* _ASM_LOONGARCH_NUMA_H */