Commit d493bb5b authored by Bo Jiao's avatar Bo Jiao Committed by Felix Fietkau
Browse files

wifi: mt76: mt7915: rework mt7915_dma_reset() 



Reuse mt7915_dma_disable() to reduce duplicated code.
This is a preliminary patch to enable full system reset.

Co-developed-by: default avatarRyder Lee <ryder.lee@mediatek.com>
Signed-off-by: default avatarRyder Lee <ryder.lee@mediatek.com>
Signed-off-by: default avatarBo Jiao <Bo.Jiao@mediatek.com>
Signed-off-by: default avatarFelix Fietkau <nbd@nbd.name>
parent d107501a

drivers/net/wireless/mediatek/mt76/mt7915/dma.c

+89 −21
Original line number Diff line number Diff line
@@ -50,23 +50,37 @@ static void mt7915_dma_config(struct mt7915_dev *dev) 
#define TXQ_CONFIG(q, wfdma, int, id)	Q_CONFIG(__TXQ(q), (wfdma), (int), (id))



	if (is_mt7915(&dev->mt76)) {

		RXQ_CONFIG(MT_RXQ_MAIN, WFDMA0, MT_INT_RX_DONE_BAND0, MT7915_RXQ_BAND0);

		RXQ_CONFIG(MT_RXQ_MCU, WFDMA1, MT_INT_RX_DONE_WM, MT7915_RXQ_MCU_WM);

		RXQ_CONFIG(MT_RXQ_MCU_WA, WFDMA1, MT_INT_RX_DONE_WA, MT7915_RXQ_MCU_WA);

		RXQ_CONFIG(MT_RXQ_BAND1, WFDMA0, MT_INT_RX_DONE_BAND1, MT7915_RXQ_BAND1);

		RXQ_CONFIG(MT_RXQ_BAND1_WA, WFDMA1, MT_INT_RX_DONE_WA_EXT, MT7915_RXQ_MCU_WA_EXT);

		RXQ_CONFIG(MT_RXQ_MAIN_WA, WFDMA1, MT_INT_RX_DONE_WA_MAIN, MT7915_RXQ_MCU_WA);

		RXQ_CONFIG(MT_RXQ_MAIN, WFDMA0, MT_INT_RX_DONE_BAND0,

			   MT7915_RXQ_BAND0);

		RXQ_CONFIG(MT_RXQ_MCU, WFDMA1, MT_INT_RX_DONE_WM,

			   MT7915_RXQ_MCU_WM);

		RXQ_CONFIG(MT_RXQ_MCU_WA, WFDMA1, MT_INT_RX_DONE_WA,

			   MT7915_RXQ_MCU_WA);

		RXQ_CONFIG(MT_RXQ_BAND1, WFDMA0, MT_INT_RX_DONE_BAND1,

			   MT7915_RXQ_BAND1);

		RXQ_CONFIG(MT_RXQ_BAND1_WA, WFDMA1, MT_INT_RX_DONE_WA_EXT,

			   MT7915_RXQ_MCU_WA_EXT);

		RXQ_CONFIG(MT_RXQ_MAIN_WA, WFDMA1, MT_INT_RX_DONE_WA_MAIN,

			   MT7915_RXQ_MCU_WA);

		TXQ_CONFIG(0, WFDMA1, MT_INT_TX_DONE_BAND0, MT7915_TXQ_BAND0);

		TXQ_CONFIG(1, WFDMA1, MT_INT_TX_DONE_BAND1, MT7915_TXQ_BAND1);

		MCUQ_CONFIG(MT_MCUQ_WM, WFDMA1, MT_INT_TX_DONE_MCU_WM, MT7915_TXQ_MCU_WM);

		MCUQ_CONFIG(MT_MCUQ_WA, WFDMA1, MT_INT_TX_DONE_MCU_WA, MT7915_TXQ_MCU_WA);

		MCUQ_CONFIG(MT_MCUQ_FWDL, WFDMA1, MT_INT_TX_DONE_FWDL, MT7915_TXQ_FWDL);

		MCUQ_CONFIG(MT_MCUQ_WM, WFDMA1, MT_INT_TX_DONE_MCU_WM,

			    MT7915_TXQ_MCU_WM);

		MCUQ_CONFIG(MT_MCUQ_WA, WFDMA1, MT_INT_TX_DONE_MCU_WA,

			    MT7915_TXQ_MCU_WA);

		MCUQ_CONFIG(MT_MCUQ_FWDL, WFDMA1, MT_INT_TX_DONE_FWDL,

			    MT7915_TXQ_FWDL);

	} else {

		RXQ_CONFIG(MT_RXQ_MCU, WFDMA0, MT_INT_RX_DONE_WM, MT7916_RXQ_MCU_WM);

		RXQ_CONFIG(MT_RXQ_BAND1_WA, WFDMA0, MT_INT_RX_DONE_WA_EXT_MT7916, MT7916_RXQ_MCU_WA_EXT);

		MCUQ_CONFIG(MT_MCUQ_WM, WFDMA0, MT_INT_TX_DONE_MCU_WM, MT7915_TXQ_MCU_WM);

		MCUQ_CONFIG(MT_MCUQ_WA, WFDMA0, MT_INT_TX_DONE_MCU_WA_MT7916, MT7915_TXQ_MCU_WA);

		MCUQ_CONFIG(MT_MCUQ_FWDL, WFDMA0, MT_INT_TX_DONE_FWDL, MT7915_TXQ_FWDL);

		RXQ_CONFIG(MT_RXQ_MCU, WFDMA0, MT_INT_RX_DONE_WM,

			   MT7916_RXQ_MCU_WM);

		RXQ_CONFIG(MT_RXQ_BAND1_WA, WFDMA0, MT_INT_RX_DONE_WA_EXT_MT7916,

			   MT7916_RXQ_MCU_WA_EXT);

		MCUQ_CONFIG(MT_MCUQ_WM, WFDMA0, MT_INT_TX_DONE_MCU_WM,

			    MT7915_TXQ_MCU_WM);

		MCUQ_CONFIG(MT_MCUQ_WA, WFDMA0, MT_INT_TX_DONE_MCU_WA_MT7916,

			    MT7915_TXQ_MCU_WA);

		MCUQ_CONFIG(MT_MCUQ_FWDL, WFDMA0, MT_INT_TX_DONE_FWDL,

			    MT7915_TXQ_FWDL);



		if (is_mt7916(&dev->mt76) && mtk_wed_device_active(&dev->mt76.mmio.wed)) {

			RXQ_CONFIG(MT_RXQ_MAIN, WFDMA0, MT_INT_WED_RX_DONE_BAND0_MT7916,
@@ -77,16 +91,23 @@ static void mt7915_dma_config(struct mt7915_dev *dev) 
				   MT7916_RXQ_BAND1);

			RXQ_CONFIG(MT_RXQ_MAIN_WA, WFDMA0, MT_INT_WED_RX_DONE_WA_MAIN_MT7916,

				   MT7916_RXQ_MCU_WA_MAIN);

			TXQ_CONFIG(0, WFDMA0, MT_INT_WED_TX_DONE_BAND0, MT7915_TXQ_BAND0);

			TXQ_CONFIG(1, WFDMA0, MT_INT_WED_TX_DONE_BAND1, MT7915_TXQ_BAND1);

			TXQ_CONFIG(0, WFDMA0, MT_INT_WED_TX_DONE_BAND0,

				   MT7915_TXQ_BAND0);

			TXQ_CONFIG(1, WFDMA0, MT_INT_WED_TX_DONE_BAND1,

				   MT7915_TXQ_BAND1);

		} else {

			RXQ_CONFIG(MT_RXQ_MAIN, WFDMA0, MT_INT_RX_DONE_BAND0_MT7916, MT7916_RXQ_BAND0);

			RXQ_CONFIG(MT_RXQ_MCU_WA, WFDMA0, MT_INT_RX_DONE_WA, MT7916_RXQ_MCU_WA);

			RXQ_CONFIG(MT_RXQ_BAND1, WFDMA0, MT_INT_RX_DONE_BAND1_MT7916, MT7916_RXQ_BAND1);

			RXQ_CONFIG(MT_RXQ_MAIN, WFDMA0, MT_INT_RX_DONE_BAND0_MT7916,

				   MT7916_RXQ_BAND0);

			RXQ_CONFIG(MT_RXQ_MCU_WA, WFDMA0, MT_INT_RX_DONE_WA,

				   MT7916_RXQ_MCU_WA);

			RXQ_CONFIG(MT_RXQ_BAND1, WFDMA0, MT_INT_RX_DONE_BAND1_MT7916,

				   MT7916_RXQ_BAND1);

			RXQ_CONFIG(MT_RXQ_MAIN_WA, WFDMA0, MT_INT_RX_DONE_WA_MAIN_MT7916,

				   MT7916_RXQ_MCU_WA_MAIN);

			TXQ_CONFIG(0, WFDMA0, MT_INT_TX_DONE_BAND0, MT7915_TXQ_BAND0);

			TXQ_CONFIG(1, WFDMA0, MT_INT_TX_DONE_BAND1, MT7915_TXQ_BAND1);

			TXQ_CONFIG(0, WFDMA0, MT_INT_TX_DONE_BAND0,

				   MT7915_TXQ_BAND0);

			TXQ_CONFIG(1, WFDMA0, MT_INT_TX_DONE_BAND1,

				   MT7915_TXQ_BAND1);

		}

	}

}
@@ -514,6 +535,53 @@ int mt7915_dma_init(struct mt7915_dev *dev, struct mt7915_phy *phy2) 
	return 0;

}



int mt7915_dma_reset(struct mt7915_dev *dev, bool force)

{

	struct mt76_phy *mphy_ext = dev->mt76.phys[MT_BAND1];

	int i;



	/* clean up hw queues */

	for (i = 0; i < ARRAY_SIZE(dev->mt76.phy.q_tx); i++) {

		mt76_queue_tx_cleanup(dev, dev->mphy.q_tx[i], true);

		if (mphy_ext)

			mt76_queue_tx_cleanup(dev, mphy_ext->q_tx[i], true);

	}



	for (i = 0; i < ARRAY_SIZE(dev->mt76.q_mcu); i++)

		mt76_queue_tx_cleanup(dev, dev->mt76.q_mcu[i], true);



	mt76_for_each_q_rx(&dev->mt76, i)

		mt76_queue_rx_cleanup(dev, &dev->mt76.q_rx[i]);



	/* reset wfsys */

	if (force)

		mt7915_wfsys_reset(dev);



	mt7915_dma_disable(dev, force);



	/* reset hw queues */

	for (i = 0; i < __MT_TXQ_MAX; i++) {

		mt76_queue_reset(dev, dev->mphy.q_tx[i]);

		if (mphy_ext)

			mt76_queue_reset(dev, mphy_ext->q_tx[i]);

	}



	for (i = 0; i < __MT_MCUQ_MAX; i++)

		mt76_queue_reset(dev, dev->mt76.q_mcu[i]);



	mt76_for_each_q_rx(&dev->mt76, i)

		mt76_queue_reset(dev, &dev->mt76.q_rx[i]);



	mt76_tx_status_check(&dev->mt76, true);



	mt7915_dma_enable(dev);



	mt76_for_each_q_rx(&dev->mt76, i)

		mt76_queue_rx_reset(dev, i);



	return 0;

}



void mt7915_dma_cleanup(struct mt7915_dev *dev)

{

	mt7915_dma_disable(dev, true);

drivers/net/wireless/mediatek/mt76/mt7915/mac.c

+1 −68
Original line number Diff line number Diff line
@@ -1332,73 +1332,6 @@ mt7915_update_beacons(struct mt7915_dev *dev) 
		mt7915_update_vif_beacon, mphy_ext->hw);

}



static void

mt7915_dma_reset(struct mt7915_dev *dev)

{

	struct mt76_phy *mphy_ext = dev->mt76.phys[MT_BAND1];

	u32 hif1_ofs = MT_WFDMA0_PCIE1(0) - MT_WFDMA0(0);

	int i;



	mt76_clear(dev, MT_WFDMA0_GLO_CFG,

		   MT_WFDMA0_GLO_CFG_TX_DMA_EN |

		   MT_WFDMA0_GLO_CFG_RX_DMA_EN);



	if (is_mt7915(&dev->mt76))

		mt76_clear(dev, MT_WFDMA1_GLO_CFG,

			   MT_WFDMA1_GLO_CFG_TX_DMA_EN |

			   MT_WFDMA1_GLO_CFG_RX_DMA_EN);

	if (dev->hif2) {

		mt76_clear(dev, MT_WFDMA0_GLO_CFG + hif1_ofs,

			   MT_WFDMA0_GLO_CFG_TX_DMA_EN |

			   MT_WFDMA0_GLO_CFG_RX_DMA_EN);



		if (is_mt7915(&dev->mt76))

			mt76_clear(dev, MT_WFDMA1_GLO_CFG + hif1_ofs,

				   MT_WFDMA1_GLO_CFG_TX_DMA_EN |

				   MT_WFDMA1_GLO_CFG_RX_DMA_EN);

	}



	usleep_range(1000, 2000);



	for (i = 0; i < __MT_TXQ_MAX; i++) {

		mt76_queue_tx_cleanup(dev, dev->mphy.q_tx[i], true);

		if (mphy_ext)

			mt76_queue_tx_cleanup(dev, mphy_ext->q_tx[i], true);

	}



	for (i = 0; i < __MT_MCUQ_MAX; i++)

		mt76_queue_tx_cleanup(dev, dev->mt76.q_mcu[i], true);



	mt76_for_each_q_rx(&dev->mt76, i)

		mt76_queue_rx_reset(dev, i);



	mt76_tx_status_check(&dev->mt76, true);



	/* re-init prefetch settings after reset */

	mt7915_dma_prefetch(dev);



	mt76_set(dev, MT_WFDMA0_GLO_CFG,

		 MT_WFDMA0_GLO_CFG_TX_DMA_EN | MT_WFDMA0_GLO_CFG_RX_DMA_EN);

	if (is_mt7915(&dev->mt76))

		mt76_set(dev, MT_WFDMA1_GLO_CFG,

			 MT_WFDMA1_GLO_CFG_TX_DMA_EN |

			 MT_WFDMA1_GLO_CFG_RX_DMA_EN |

			 MT_WFDMA1_GLO_CFG_OMIT_TX_INFO |

			 MT_WFDMA1_GLO_CFG_OMIT_RX_INFO);

	if (dev->hif2) {

		mt76_set(dev, MT_WFDMA0_GLO_CFG + hif1_ofs,

			 MT_WFDMA0_GLO_CFG_TX_DMA_EN |

			 MT_WFDMA0_GLO_CFG_RX_DMA_EN);



		if (is_mt7915(&dev->mt76))

			mt76_set(dev, MT_WFDMA1_GLO_CFG + hif1_ofs,

				 MT_WFDMA1_GLO_CFG_TX_DMA_EN |

				 MT_WFDMA1_GLO_CFG_RX_DMA_EN |

				 MT_WFDMA1_GLO_CFG_OMIT_TX_INFO |

				 MT_WFDMA1_GLO_CFG_OMIT_RX_INFO);

	}

}



void mt7915_tx_token_put(struct mt7915_dev *dev)

{

	struct mt76_txwi_cache *txwi;
@@ -1450,7 +1383,7 @@ void mt7915_mac_reset_work(struct work_struct *work) 
	mt76_wr(dev, MT_MCU_INT_EVENT, MT_MCU_INT_EVENT_DMA_STOPPED);



	if (mt7915_wait_reset_state(dev, MT_MCU_CMD_RESET_DONE)) {

		mt7915_dma_reset(dev);

		mt7915_dma_reset(dev, false);



		mt7915_tx_token_put(dev);

		idr_init(&dev->mt76.token);

drivers/net/wireless/mediatek/mt76/mt7915/mt7915.h

+1 −0
Original line number Diff line number Diff line
@@ -447,6 +447,7 @@ s8 mt7915_eeprom_get_power_delta(struct mt7915_dev *dev, int band); 
int mt7915_dma_init(struct mt7915_dev *dev, struct mt7915_phy *phy2);

void mt7915_dma_prefetch(struct mt7915_dev *dev);

void mt7915_dma_cleanup(struct mt7915_dev *dev);

int mt7915_dma_reset(struct mt7915_dev *dev, bool force);

int mt7915_mcu_init(struct mt7915_dev *dev);

int mt7915_mcu_twt_agrt_update(struct mt7915_dev *dev,

			       struct mt7915_vif *mvif,