Commit d45b832d authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux 

Pull arm64 fixes from Will Deacon:
 "Here's a sizeable batch of Friday the 13th arm64 fixes for -rc4. What
  could possibly go wrong?

  The obvious reason we have so much here is because of the holiday
  season right after the merge window, but we've also brought back an
  erratum workaround that was previously dropped at the last minute and
  there's an MTE coredumping fix that strays outside of the arch/arm64
  directory.

  Summary:

   - Fix PAGE_TABLE_CHECK failures on hugepage splitting path

   - Fix PSCI encoding of MEM_PROTECT_RANGE function in UAPI header

   - Fix NULL deref when accessing debugfs node if PSCI is not present

   - Fix MTE core dumping when VMA list is being updated concurrently

   - Fix SME signal frame handling when SVE is not implemented by the
     CPU

   - Fix asm constraints for cmpxchg_double() to hazard both words

   - Fix build failure with stack tracer and older versions of Clang

   - Bring back workaround for Cortex-A715 erratum 2645198"

* tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux:
  arm64: Fix build with CC=clang, CONFIG_FTRACE=y and CONFIG_STACK_TRACER=y
  arm64/mm: Define dummy pud_user_exec() when using 2-level page-table
  arm64: errata: Workaround possible Cortex-A715 [ESR|FAR]_ELx corruption
  firmware/psci: Don't register with debugfs if PSCI isn't available
  firmware/psci: Fix MEM_PROTECT_RANGE function numbers
  arm64/signal: Always allocate SVE signal frames on SME only systems
  arm64/signal: Always accept SVE signal frames on SME only systems
  arm64/sme: Fix context switch for SME only systems
  arm64: cmpxchg_double*: hazard against entire exchange variable
  arm64/uprobes: change the uprobe_opcode_t typedef to fix the sparse warning
  arm64: mte: Avoid the racy walk of the vma list during core dump
  elfcore: Add a cprm parameter to elf_core_extra_{phdrs,data_size}
  arm64: mte: Fix double-freeing of the temporary tag storage during coredump
  arm64: ptrace: Use ARM64_SME to guard the SME register enumerations
  arm64/mm: add pud_user_exec() check in pud_user_accessible_page()
  arm64/mm: fix incorrect file_map_count for invalid pmd
parents d9fc1511 68a63a41

Documentation/arm64/silicon-errata.rst

+2 −0
Original line number Diff line number Diff line
@@ -120,6 +120,8 @@ stable kernels. 
+----------------+-----------------+-----------------+-----------------------------+

| ARM            | Cortex-A710     | #2224489        | ARM64_ERRATUM_2224489       |

+----------------+-----------------+-----------------+-----------------------------+

| ARM            | Cortex-A715     | #2645198        | ARM64_ERRATUM_2645198       |

+----------------+-----------------+-----------------+-----------------------------+

| ARM            | Cortex-X2       | #2119858        | ARM64_ERRATUM_2119858       |

+----------------+-----------------+-----------------+-----------------------------+

| ARM            | Cortex-X2       | #2224489        | ARM64_ERRATUM_2224489       |

arch/arm64/Kconfig

+16 −2
Original line number Diff line number Diff line
@@ -184,8 +184,6 @@ config ARM64 
	select HAVE_DEBUG_KMEMLEAK

	select HAVE_DMA_CONTIGUOUS

	select HAVE_DYNAMIC_FTRACE

	select HAVE_DYNAMIC_FTRACE_WITH_ARGS \

		if $(cc-option,-fpatchable-function-entry=2)

	select FTRACE_MCOUNT_USE_PATCHABLE_FUNCTION_ENTRY \

		if DYNAMIC_FTRACE_WITH_ARGS

	select HAVE_EFFICIENT_UNALIGNED_ACCESS
@@ -972,6 +970,22 @@ config ARM64_ERRATUM_2457168 


	  If unsure, say Y.



config ARM64_ERRATUM_2645198

	bool "Cortex-A715: 2645198: Workaround possible [ESR|FAR]_ELx corruption"

	default y

	help

	  This option adds the workaround for ARM Cortex-A715 erratum 2645198.



	  If a Cortex-A715 cpu sees a page mapping permissions change from executable

	  to non-executable, it may corrupt the ESR_ELx and FAR_ELx registers on the

	  next instruction abort caused by permission fault.



	  Only user-space does executable to non-executable permission transition via

	  mprotect() system call. Workaround the problem by doing a break-before-make

	  TLB invalidation, for all changes to executable user space mappings.



	  If unsure, say Y.



config CAVIUM_ERRATUM_22375

	bool "Cavium erratum 22375, 24313"

	default y

arch/arm64/include/asm/atomic_ll_sc.h

+1 −1
Original line number Diff line number Diff line
@@ -315,7 +315,7 @@ __ll_sc__cmpxchg_double##name(unsigned long old1, \ 
	"	cbnz	%w0, 1b\n"					\

	"	" #mb "\n"						\

	"2:"								\

	: "=&r" (tmp), "=&r" (ret), "+Q" (*(unsigned long *)ptr)	\

	: "=&r" (tmp), "=&r" (ret), "+Q" (*(__uint128_t *)ptr)		\

	: "r" (old1), "r" (old2), "r" (new1), "r" (new2)		\

	: cl);								\

									\

arch/arm64/include/asm/atomic_lse.h

+1 −1
Original line number Diff line number Diff line
@@ -311,7 +311,7 @@ __lse__cmpxchg_double##name(unsigned long old1, \ 
	"	eor	%[old2], %[old2], %[oldval2]\n"			\

	"	orr	%[old1], %[old1], %[old2]"			\

	: [old1] "+&r" (x0), [old2] "+&r" (x1),				\

	  [v] "+Q" (*(unsigned long *)ptr)				\

	  [v] "+Q" (*(__uint128_t *)ptr)				\

	: [new1] "r" (x2), [new2] "r" (x3), [ptr] "r" (x4),		\

	  [oldval1] "r" (oldval1), [oldval2] "r" (oldval2)		\

	: cl);								\

arch/arm64/include/asm/hugetlb.h

+9 −0
Original line number Diff line number Diff line
@@ -49,6 +49,15 @@ extern pte_t huge_ptep_get(pte_t *ptep); 


void __init arm64_hugetlb_cma_reserve(void);



#define huge_ptep_modify_prot_start huge_ptep_modify_prot_start

extern pte_t huge_ptep_modify_prot_start(struct vm_area_struct *vma,

					 unsigned long addr, pte_t *ptep);



#define huge_ptep_modify_prot_commit huge_ptep_modify_prot_commit

extern void huge_ptep_modify_prot_commit(struct vm_area_struct *vma,

					 unsigned long addr, pte_t *ptep,

					 pte_t old_pte, pte_t new_pte);



#include <asm-generic/hugetlb.h>



#endif /* __ASM_HUGETLB_H */