Commit d3f2c48d authored by Jakub Kicinski's avatar Jakub Kicinski
Browse files

Merge branch 'npc-kpu-updates' 

George Cherian says:

====================
NPC KPU updates

Add support for
 - Loading Custom KPU profile entries
 - Add NPC profile Load from System Firmware DB
 - Add Support fo Coalescing KPU profiles
 - General Updates/Fixes to default KPU profile
====================

Link: https://lore.kernel.org/r/20210527094439.1910013-1-george.cherian@marvell.com


Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parents 015dbf56 f9c49be9

drivers/net/ethernet/marvell/octeontx2/af/npc.h

+97 −7
Original line number Diff line number Diff line
@@ -33,6 +33,10 @@ enum npc_kpu_la_ltype { 
	NPC_LT_LA_IH_2_ETHER,

	NPC_LT_LA_HIGIG2_ETHER,

	NPC_LT_LA_IH_NIX_HIGIG2_ETHER,

	NPC_LT_LA_CUSTOM_L2_90B_ETHER,

	NPC_LT_LA_CH_LEN_90B_ETHER,

	NPC_LT_LA_CPT_HDR,

	NPC_LT_LA_CUSTOM_L2_24B_ETHER,

	NPC_LT_LA_CUSTOM0 = 0xE,

	NPC_LT_LA_CUSTOM1 = 0xF,

};
@@ -42,7 +46,7 @@ enum npc_kpu_lb_ltype { 
	NPC_LT_LB_CTAG,

	NPC_LT_LB_STAG_QINQ,

	NPC_LT_LB_BTAG,

	NPC_LT_LB_ITAG,

	NPC_LT_LB_PPPOE,

	NPC_LT_LB_DSA,

	NPC_LT_LB_DSA_VLAN,

	NPC_LT_LB_EDSA,
@@ -50,6 +54,7 @@ enum npc_kpu_lb_ltype { 
	NPC_LT_LB_EXDSA,

	NPC_LT_LB_EXDSA_VLAN,

	NPC_LT_LB_FDSA,

	NPC_LT_LB_VLAN_EXDSA,

	NPC_LT_LB_CUSTOM0 = 0xE,

	NPC_LT_LB_CUSTOM1 = 0xF,

};
@@ -65,6 +70,7 @@ enum npc_kpu_lc_ltype { 
	NPC_LT_LC_NSH,

	NPC_LT_LC_PTP,

	NPC_LT_LC_FCOE,

	NPC_LT_LC_NGIO,

	NPC_LT_LC_CUSTOM0 = 0xE,

	NPC_LT_LC_CUSTOM1 = 0xF,

};
@@ -146,7 +152,14 @@ enum npc_kpu_lh_ltype { 
 * Ethernet interfaces, LBK interfaces, etc.

 */

enum npc_pkind_type {

	NPC_TX_DEF_PKIND = 63ULL,	/* NIX-TX PKIND */

	NPC_RX_VLAN_EXDSA_PKIND = 56ULL,

	NPC_RX_CHLEN24B_PKIND = 57ULL,

	NPC_RX_CPT_HDR_PKIND,

	NPC_RX_CHLEN90B_PKIND,

	NPC_TX_HIGIG_PKIND,

	NPC_RX_HIGIG_PKIND,

	NPC_RX_EDSA_PKIND,

	NPC_TX_DEF_PKIND,	/* NIX-TX PKIND */

};



/* list of known and supported fields in packet header and
@@ -213,7 +226,7 @@ struct npc_kpu_profile_cam { 
	u16 dp1_mask;

	u16 dp2;

	u16 dp2_mask;

};

} __packed;



struct npc_kpu_profile_action {

	u8 errlev;
@@ -233,13 +246,13 @@ struct npc_kpu_profile_action { 
	u8 mask;

	u8 right;

	u8 shift;

};

} __packed;



struct npc_kpu_profile {

	int cam_entries;

	int action_entries;

	const struct npc_kpu_profile_cam *cam;

	const struct npc_kpu_profile_action *action;

	struct npc_kpu_profile_cam *cam;

	struct npc_kpu_profile_action *action;

};



/* NPC KPU register formats */
@@ -427,6 +440,17 @@ struct nix_tx_action { 
#define NIXLF_BCAST_ENTRY	1

#define NIXLF_PROMISC_ENTRY	2



struct npc_coalesced_kpu_prfl {

#define NPC_SIGN	0x00666f727063706e

#define NPC_PRFL_NAME   "npc_prfls_array"

#define NPC_NAME_LEN	32

	__le64 signature; /* "npcprof\0" (8 bytes/ASCII characters) */

	u8 name[NPC_NAME_LEN]; /* KPU Profile name */

	u64 version; /* KPU firmware/profile version */

	u8 num_prfl; /* No of NPC profiles. */

	u16 prfl_sz[0];

};



struct npc_mcam_kex {

	/* MKEX Profle Header */

	u64 mkex_sign; /* "mcam-kex-profile" (8 bytes/ASCII characters) */
@@ -445,6 +469,15 @@ struct npc_mcam_kex { 
	u64 intf_ld_flags[NPC_MAX_INTF][NPC_MAX_LD][NPC_MAX_LFL];

} __packed;



struct npc_kpu_fwdata {

	int	entries;

	/* What follows is:

	 * struct npc_kpu_profile_cam[entries];

	 * struct npc_kpu_profile_action[entries];

	 */

	u8	data[0];

} __packed;



struct npc_lt_def {

	u8	ltype_mask;

	u8	ltype_match;
@@ -459,6 +492,29 @@ struct npc_lt_def_ipsec { 
	u8	spi_nz;

};



struct npc_lt_def_apad {

	u8	ltype_mask;

	u8	ltype_match;

	u8	lid;

	u8	valid;

} __packed;



struct npc_lt_def_color {

	u8	ltype_mask;

	u8	ltype_match;

	u8	lid;

	u8	noffset;

	u8	offset;

} __packed;



struct npc_lt_def_et {

	u8	ltype_mask;

	u8	ltype_match;

	u8	lid;

	u8	valid;

	u8	offset;

} __packed;



struct npc_lt_def_cfg {

	struct npc_lt_def	rx_ol2;

	struct npc_lt_def	rx_oip4;
@@ -476,7 +532,41 @@ struct npc_lt_def_cfg { 
	struct npc_lt_def	pck_oip4;

	struct npc_lt_def	pck_oip6;

	struct npc_lt_def	pck_iip4;

};

	struct npc_lt_def_apad	rx_apad0;

	struct npc_lt_def_apad	rx_apad1;

	struct npc_lt_def_color	ovlan;

	struct npc_lt_def_color	ivlan;

	struct npc_lt_def_color	rx_gen0_color;

	struct npc_lt_def_color	rx_gen1_color;

	struct npc_lt_def_et	rx_et[2];

} __packed;



/* Loadable KPU profile firmware data */

struct npc_kpu_profile_fwdata {

#define KPU_SIGN	0x00666f727075706b

#define KPU_NAME_LEN	32

/** Maximum number of custom KPU entries supported by the built-in profile. */

#define KPU_MAX_CST_ENT	2

	/* KPU Profle Header */

	__le64	signature; /* "kpuprof\0" (8 bytes/ASCII characters) */

	u8	name[KPU_NAME_LEN]; /* KPU Profile name */

	__le64	version; /* KPU profile version */

	u8	kpus;

	u8	reserved[7];



	/* Default MKEX profile to be used with this KPU profile. May be

	 * overridden with mkex_profile module parameter. Format is same as for

	 * the MKEX profile to streamline processing.

	 */

	struct npc_mcam_kex	mkex;

	/* LTYPE values for specific HW offloaded protocols. */

	struct npc_lt_def_cfg	lt_def;

	/* Dynamically sized data:

	 *  Custom KPU CAM and ACTION configuration entries.

	 * struct npc_kpu_fwdata kpu[kpus];

	 */

	u8	data[0];

} __packed;



struct rvu_npc_mcam_rule {

	struct flow_msg packet;

drivers/net/ethernet/marvell/octeontx2/af/npc_profile.h

+5417 −3258

File changed.

Preview size limit exceeded, changes collapsed.

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

+6 −0
Original line number Diff line number Diff line
@@ -57,6 +57,10 @@ static char *mkex_profile; /* MKEX profile name */ 
module_param(mkex_profile, charp, 0000);

MODULE_PARM_DESC(mkex_profile, "MKEX profile name string");



static char *kpu_profile; /* KPU profile name */

module_param(kpu_profile, charp, 0000);

MODULE_PARM_DESC(kpu_profile, "KPU profile name string");



static void rvu_setup_hw_capabilities(struct rvu *rvu)

{

	struct rvu_hwinfo *hw = rvu->hw;
@@ -2842,6 +2846,8 @@ static void rvu_update_module_params(struct rvu *rvu) 


	strscpy(rvu->mkex_pfl_name,

		mkex_profile ? mkex_profile : default_pfl_name, MKEX_NAME_LEN);

	strscpy(rvu->kpu_pfl_name,

		kpu_profile ? kpu_profile : default_pfl_name, KPU_NAME_LEN);

}



static int rvu_probe(struct pci_dev *pdev, const struct pci_device_id *id)

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

+5 −0
Original line number Diff line number Diff line
@@ -386,6 +386,7 @@ struct npc_kpu_profile_adapter { 
	const struct npc_kpu_profile_action	*ikpu; /* array[pkinds] */

	const struct npc_kpu_profile	*kpu; /* array[kpus] */

	struct npc_mcam_kex		*mkex;

	bool				custom;

	size_t				pkinds;

	size_t				kpus;

};
@@ -435,9 +436,13 @@ struct rvu { 
	struct mutex		cgx_cfg_lock; /* serialize cgx configuration */



	char mkex_pfl_name[MKEX_NAME_LEN]; /* Configured MKEX profile name */

	char kpu_pfl_name[KPU_NAME_LEN]; /* Configured KPU profile name */



	/* Firmware data */

	struct rvu_fwdata	*fwdata;

	void			*kpu_fwdata;

	size_t			kpu_fwdata_sz;

	void __iomem		*kpu_prfl_addr;



	/* NPC KPU data */

	struct npc_kpu_profile_adapter kpu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

+34 −0
Original line number Diff line number Diff line
@@ -3523,6 +3523,40 @@ static int rvu_nix_block_init(struct rvu *rvu, struct nix_hw *nix_hw) 
			    (ltdefs->rx_isctp.lid << 8) | (ltdefs->rx_isctp.ltype_match << 4) |

			    ltdefs->rx_isctp.ltype_mask);



		if (!is_rvu_otx2(rvu)) {

			/* Enable APAD calculation for other protocols

			 * matching APAD0 and APAD1 lt def registers.

			 */

			rvu_write64(rvu, blkaddr, NIX_AF_RX_DEF_CST_APAD0,

				    (ltdefs->rx_apad0.valid << 11) |

				    (ltdefs->rx_apad0.lid << 8) |

				    (ltdefs->rx_apad0.ltype_match << 4) |

				    ltdefs->rx_apad0.ltype_mask);

			rvu_write64(rvu, blkaddr, NIX_AF_RX_DEF_CST_APAD1,

				    (ltdefs->rx_apad1.valid << 11) |

				    (ltdefs->rx_apad1.lid << 8) |

				    (ltdefs->rx_apad1.ltype_match << 4) |

				    ltdefs->rx_apad1.ltype_mask);



			/* Receive ethertype defination register defines layer

			 * information in NPC_RESULT_S to identify the Ethertype

			 * location in L2 header. Used for Ethertype overwriting

			 * in inline IPsec flow.

			 */

			rvu_write64(rvu, blkaddr, NIX_AF_RX_DEF_ET(0),

				    (ltdefs->rx_et[0].offset << 12) |

				    (ltdefs->rx_et[0].valid << 11) |

				    (ltdefs->rx_et[0].lid << 8) |

				    (ltdefs->rx_et[0].ltype_match << 4) |

				    ltdefs->rx_et[0].ltype_mask);

			rvu_write64(rvu, blkaddr, NIX_AF_RX_DEF_ET(1),

				    (ltdefs->rx_et[1].offset << 12) |

				    (ltdefs->rx_et[1].valid << 11) |

				    (ltdefs->rx_et[1].lid << 8) |

				    (ltdefs->rx_et[1].ltype_match << 4) |

				    ltdefs->rx_et[1].ltype_mask);

		}



		err = nix_rx_flowkey_alg_cfg(rvu, blkaddr);

		if (err)

			return err;