Commit d3de41ee authored by Lijo Lazar's avatar Lijo Lazar Committed by Alex Deucher
Browse files

drm/amdgpu: Match against exact bootloader status 



On PSP v13.x ASICs, boot loader will set only the MSB to 1 and clear the
least significant bits for any command submission. Hence match against
the exact register value, otherwise a register value of all 0xFFs also
could falsely indicate that boot loader is ready. Also, from PSP v13.0.6
and newer, bits[7:0] will be used to indicate command error status.

Signed-off-by: default avatarLijo Lazar <lijo.lazar@amd.com>
Acked-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 730d44e1

drivers/gpu/drm/amd/amdgpu/psp_v13_0.c

+8 −7
Original line number Diff line number Diff line
@@ -137,14 +137,15 @@ static int psp_v13_0_wait_for_bootloader(struct psp_context *psp) 
	int ret;

	int retry_loop;



	/* Wait for bootloader to signify that it is ready having bit 31 of

	 * C2PMSG_35 set to 1. All other bits are expected to be cleared.

	 * If there is an error in processing command, bits[7:0] will be set.

	 * This is applicable for PSP v13.0.6 and newer.

	 */

	for (retry_loop = 0; retry_loop < 10; retry_loop++) {

		/* Wait for bootloader to signify that is

		    ready having bit 31 of C2PMSG_35 set to 1 */

		ret = psp_wait_for(psp,

				   SOC15_REG_OFFSET(MP0, 0, regMP0_SMN_C2PMSG_35),

				   0x80000000,

				   0x80000000,

				   false);

		ret = psp_wait_for(

			psp, SOC15_REG_OFFSET(MP0, 0, regMP0_SMN_C2PMSG_35),

			0x80000000, 0xffffffff, false);



		if (ret == 0)

			return 0;