Commit d355cd05 authored Nov 29, 2022 by Ashok Raj Committed by Aichun Shi Mar 17, 2023

x86/microcode/intel: Do not retry microcode reloading on the APs

mainline inclusion
from mainline-v6.2-rc1
commit be1b670f
category: feature
feature: Backport Intel In Field Scan(IFS) multi-blob images support
bugzilla: https://gitee.com/openeuler/intel-kernel/issues/I6L337
CVE: N/A
Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/


commit/?id=be1b670f

Intel-SIG: commit be1b670f ("x86/microcode/intel: Do not retry microcode reloading on the APs")

-------------------------------------

x86/microcode/intel: Do not retry microcode reloading on the APs

The retries in load_ucode_intel_ap() were in place to support systems
with mixed steppings. Mixed steppings are no longer supported and there is
only one microcode image at a time. Any retries will simply reattempt to
apply the same image over and over without making progress.

  [ bp: Zap the circumstantial reasoning from the commit message. ]

Fixes: 06b8534c ("x86/microcode: Rework microcode loading")
Signed-off-by: Ashok Raj <ashok.raj@intel.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20221129210832.107850-3-ashok.raj@intel.com


Signed-off-by: Aichun Shi <aichun.shi@intel.com>

parent 940e49b9

arch/x86/kernel/cpu/microcode/intel.c

+1 −7

Original line number	Diff line number	Diff line
		@@ -488,7 +488,6 @@ void load_ucode_intel_ap(void)
		else
		iup = &intel_ucode_patch;

		reget:
		if (!*iup) {
		patch = __load_ucode_intel(&uci);
		if (!patch)
		@@ -499,12 +498,7 @@ void load_ucode_intel_ap(void)

		uci.mc = *iup;

		if (apply_microcode_early(&uci, true)) {
		/* Mixed-silicon system? Try to refetch the proper patch: */
		*iup = NULL;

		goto reget;
		}
		apply_microcode_early(&uci, true);
		}

		static struct microcode_intel find_patch(struct ucode_cpu_info uci)