Commit d2f9fe69 authored by Dan Williams's avatar Dan Williams
Browse files

Merge branch 'for-6.5/cxl-perf' into for-6.5/cxl 

Pick up initial support for the CXL 3.0 performance monitoring
definition. Small conflicts with the firmware update work as they both
placed their init code in the same location.
parents e2c18eb5 c2b34d44

Documentation/admin-guide/perf/cxl.rst

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.. SPDX-License-Identifier: GPL-2.0



======================================

CXL Performance Monitoring Unit (CPMU)

======================================



The CXL rev 3.0 specification provides a definition of CXL Performance

Monitoring Unit in section 13.2: Performance Monitoring.



CXL components (e.g. Root Port, Switch Upstream Port, End Point) may have

any number of CPMU instances. CPMU capabilities are fully discoverable from

the devices. The specification provides event definitions for all CXL protocol

message types and a set of additional events for things commonly counted on

CXL devices (e.g. DRAM events).



CPMU driver

===========



The CPMU driver registers a perf PMU with the name pmu_mem<X>.<Y> on the CXL bus

representing the Yth CPMU for memX.



    /sys/bus/cxl/device/pmu_mem<X>.<Y>



The associated PMU is registered as



   /sys/bus/event_sources/devices/cxl_pmu_mem<X>.<Y>



In common with other CXL bus devices, the id has no specific meaning and the

relationship to specific CXL device should be established via the device parent

of the device on the CXL bus.



PMU driver provides description of available events and filter options in sysfs.



The "format" directory describes all formats of the config (event vendor id,

group id and mask) config1 (threshold, filter enables) and config2 (filter

parameters) fields of the perf_event_attr structure.  The "events" directory

describes all documented events show in perf list.



The events shown in perf list are the most fine grained events with a single

bit of the event mask set. More general events may be enable by setting

multiple mask bits in config. For example, all Device to Host Read Requests

may be captured on a single counter by setting the bits for all of



* d2h_req_rdcurr

* d2h_req_rdown

* d2h_req_rdshared

* d2h_req_rdany

* d2h_req_rdownnodata



Example of usage::



  $#perf list

  cxl_pmu_mem0.0/clock_ticks/                        [Kernel PMU event]

  cxl_pmu_mem0.0/d2h_req_rdshared/                   [Kernel PMU event]

  cxl_pmu_mem0.0/h2d_req_snpcur/                     [Kernel PMU event]

  cxl_pmu_mem0.0/h2d_req_snpdata/                    [Kernel PMU event]

  cxl_pmu_mem0.0/h2d_req_snpinv/                     [Kernel PMU event]

  -----------------------------------------------------------



  $# perf stat -a -e cxl_pmu_mem0.0/clock_ticks/ -e cxl_pmu_mem0.0/d2h_req_rdshared/



Vendor specific events may also be available and if so can be used via



  $# perf stat -a -e cxl_pmu_mem0.0/vid=VID,gid=GID,mask=MASK/



The driver does not support sampling so "perf record" is unsupported.

It only supports system-wide counting so attaching to a task is

unsupported.

Documentation/admin-guide/perf/index.rst

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@@ -21,3 +21,4 @@ Performance monitor support 
   alibaba_pmu

   nvidia-pmu

   meson-ddr-pmu

   cxl

MAINTAINERS

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@@ -5194,6 +5194,13 @@ S: Maintained 
F:	drivers/cxl/

F:	include/uapi/linux/cxl_mem.h









COMPUTE EXPRESS LINK PMU (CPMU)









M:	Jonathan Cameron <jonathan.cameron@huawei.com>









L:	linux-cxl@vger.kernel.org









S:	Maintained









F:	Documentation/admin-guide/perf/cxl.rst









F:	drivers/perf/cxl_pmu.c

















CONEXANT ACCESSRUNNER USB DRIVER









L:	accessrunner-general@lists.sourceforge.net









S:	Orphan
































drivers/cxl/Kconfig



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@@ -140,4 +140,17 @@ config CXL_REGION_INVALIDATION_TEST







	  If unsure, or if this kernel is meant for production environments,









	  say N.



















config CXL_PMU









	tristate "CXL Performance Monitoring Unit"









	default CXL_BUS









	depends on PERF_EVENTS









	help









	  Support performance monitoring as defined in CXL rev 3.0









	  section 13.2: Performance Monitoring. CXL components may have









	  one or more CXL Performance Monitoring Units (CPMUs).



















	  Say 'y/m' to enable a driver that will attach to performance









	  monitoring units and provide standard perf based interfaces.



















	  If unsure say 'm'.









endif
























drivers/cxl/core/Makefile



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@@ -12,5 +12,6 @@ cxl_core-y += memdev.o







cxl_core-y += mbox.o









cxl_core-y += pci.o









cxl_core-y += hdm.o









cxl_core-y += pmu.o









cxl_core-$(CONFIG_TRACING) += trace.o









cxl_core-$(CONFIG_CXL_REGION) += region.o