Loading arch/arm/boot/dts/sama5d3.dtsi +378 −1 Original line number Diff line number Diff line Loading @@ -13,6 +13,7 @@ #include <dt-bindings/pinctrl/at91.h> #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/clk/at91.h> / { model = "Atmel SAMA5D3 family SoC"; Loading Loading @@ -56,6 +57,14 @@ reg = <0x20000000 0x8000000>; }; clocks { adc_op_clk: adc_op_clk{ compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <20000000>; }; }; ahb { compatible = "simple-bus"; #address-cells = <1>; Loading @@ -79,6 +88,8 @@ status = "disabled"; #address-cells = <1>; #size-cells = <0>; clocks = <&mci0_clk>; clock-names = "mci_clk"; }; spi0: spi@f0004000 { Loading @@ -92,6 +103,8 @@ dma-names = "tx", "rx"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_spi0>; clocks = <&spi0_clk>; clock-names = "spi_clk"; status = "disabled"; }; Loading @@ -101,6 +114,8 @@ interrupts = <38 IRQ_TYPE_LEVEL_HIGH 4>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; clocks = <&ssc0_clk>; clock-names = "pclk"; status = "disabled"; }; Loading @@ -108,6 +123,8 @@ compatible = "atmel,at91sam9x5-tcb"; reg = <0xf0010000 0x100>; interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>; clocks = <&tcb0_clk>; clock-names = "t0_clk"; }; i2c0: i2c@f0014000 { Loading @@ -121,6 +138,7 @@ pinctrl-0 = <&pinctrl_i2c0>; #address-cells = <1>; #size-cells = <0>; clocks = <&twi0_clk>; status = "disabled"; }; Loading @@ -135,6 +153,7 @@ pinctrl-0 = <&pinctrl_i2c1>; #address-cells = <1>; #size-cells = <0>; clocks = <&twi1_clk>; status = "disabled"; }; Loading @@ -144,6 +163,8 @@ interrupts = <12 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart0>; clocks = <&usart0_clk>; clock-names = "usart"; status = "disabled"; }; Loading @@ -153,6 +174,8 @@ interrupts = <13 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart1>; clocks = <&usart1_clk>; clock-names = "usart"; status = "disabled"; }; Loading @@ -174,6 +197,8 @@ status = "disabled"; #address-cells = <1>; #size-cells = <0>; clocks = <&mci1_clk>; clock-names = "mci_clk"; }; spi1: spi@f8008000 { Loading @@ -187,6 +212,8 @@ dma-names = "tx", "rx"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_spi1>; clocks = <&spi1_clk>; clock-names = "spi_clk"; status = "disabled"; }; Loading @@ -196,6 +223,8 @@ interrupts = <39 IRQ_TYPE_LEVEL_HIGH 4>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>; clocks = <&ssc1_clk>; clock-names = "pclk"; status = "disabled"; }; Loading @@ -219,6 +248,9 @@ &pinctrl_adc0_ad10 &pinctrl_adc0_ad11 >; clocks = <&adc_clk>, <&adc_op_clk>; clock-names = "adc_clk", "adc_op_clk"; atmel,adc-channel-base = <0x50>; atmel,adc-channels-used = <0xfff>; atmel,adc-drdy-mask = <0x1000000>; Loading Loading @@ -274,6 +306,7 @@ dma-names = "tx", "rx"; #address-cells = <1>; #size-cells = <0>; clocks = <&twi2_clk>; status = "disabled"; }; Loading @@ -283,6 +316,8 @@ interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart2>; clocks = <&usart2_clk>; clock-names = "usart"; status = "disabled"; }; Loading @@ -292,6 +327,8 @@ interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart3>; clocks = <&usart3_clk>; clock-names = "usart"; status = "disabled"; }; Loading @@ -318,6 +355,8 @@ reg = <0xffffe600 0x200>; interrupts = <30 IRQ_TYPE_LEVEL_HIGH 0>; #dma-cells = <2>; clocks = <&dma0_clk>; clock-names = "dma_clk"; }; dma1: dma-controller@ffffe800 { Loading @@ -325,6 +364,8 @@ reg = <0xffffe800 0x200>; interrupts = <31 IRQ_TYPE_LEVEL_HIGH 0>; #dma-cells = <2>; clocks = <&dma1_clk>; clock-names = "dma_clk"; }; ramc0: ramc@ffffea00 { Loading @@ -338,6 +379,8 @@ interrupts = <2 IRQ_TYPE_LEVEL_HIGH 7>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_dbgu>; clocks = <&dbgu_clk>; clock-names = "usart"; status = "disabled"; }; Loading Loading @@ -626,6 +669,7 @@ gpio-controller; interrupt-controller; #interrupt-cells = <2>; clocks = <&pioA_clk>; }; pioB: gpio@fffff400 { Loading @@ -636,6 +680,7 @@ gpio-controller; interrupt-controller; #interrupt-cells = <2>; clocks = <&pioB_clk>; }; pioC: gpio@fffff600 { Loading @@ -646,6 +691,7 @@ gpio-controller; interrupt-controller; #interrupt-cells = <2>; clocks = <&pioC_clk>; }; pioD: gpio@fffff800 { Loading @@ -656,6 +702,7 @@ gpio-controller; interrupt-controller; #interrupt-cells = <2>; clocks = <&pioD_clk>; }; pioE: gpio@fffffa00 { Loading @@ -666,12 +713,334 @@ gpio-controller; interrupt-controller; #interrupt-cells = <2>; clocks = <&pioE_clk>; }; }; pmc: pmc@fffffc00 { compatible = "atmel,at91rm9200-pmc"; compatible = "atmel,sama5d3-pmc"; reg = <0xfffffc00 0x120>; interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; interrupt-controller; #address-cells = <1>; #size-cells = <0>; #interrupt-cells = <1>; clk32k: slck { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <32768>; }; main: mainck { compatible = "atmel,at91rm9200-clk-main"; #clock-cells = <0>; interrupt-parent = <&pmc>; interrupts = <AT91_PMC_MOSCS>; clocks = <&clk32k>; }; plla: pllack { compatible = "atmel,sama5d3-clk-pll"; #clock-cells = <0>; interrupt-parent = <&pmc>; interrupts = <AT91_PMC_LOCKA>; clocks = <&main>; reg = <0>; atmel,clk-input-range = <8000000 50000000>; #atmel,pll-clk-output-range-cells = <4>; atmel,pll-clk-output-ranges = <400000000 1000000000 0 0>; }; plladiv: plladivck { compatible = "atmel,at91sam9x5-clk-plldiv"; #clock-cells = <0>; clocks = <&plla>; }; utmi: utmick { compatible = "atmel,at91sam9x5-clk-utmi"; #clock-cells = <0>; interrupt-parent = <&pmc>; interrupts = <AT91_PMC_LOCKU>; clocks = <&main>; }; mck: masterck { compatible = "atmel,at91sam9x5-clk-master"; #clock-cells = <0>; interrupt-parent = <&pmc>; interrupts = <AT91_PMC_MCKRDY>; clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>; atmel,clk-output-range = <0 166000000>; atmel,clk-divisors = <1 2 4 3>; }; usb: usbck { compatible = "atmel,at91sam9x5-clk-usb"; #clock-cells = <0>; clocks = <&plladiv>, <&utmi>; }; prog: progck { compatible = "atmel,at91sam9x5-clk-programmable"; #address-cells = <1>; #size-cells = <0>; interrupt-parent = <&pmc>; clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>; prog0: prog0 { #clock-cells = <0>; reg = <0>; interrupts = <AT91_PMC_PCKRDY(0)>; }; prog1: prog1 { #clock-cells = <0>; reg = <1>; interrupts = <AT91_PMC_PCKRDY(1)>; }; prog2: prog2 { #clock-cells = <0>; reg = <2>; interrupts = <AT91_PMC_PCKRDY(2)>; }; }; smd: smdclk { compatible = "atmel,at91sam9x5-clk-smd"; #clock-cells = <0>; clocks = <&plladiv>, <&utmi>; }; systemck { compatible = "atmel,at91rm9200-clk-system"; #address-cells = <1>; #size-cells = <0>; ddrck: ddrck { #clock-cells = <0>; reg = <2>; clocks = <&mck>; }; smdck: smdck { #clock-cells = <0>; reg = <4>; clocks = <&smd>; }; uhpck: uhpck { #clock-cells = <0>; reg = <6>; clocks = <&usb>; }; udpck: udpck { #clock-cells = <0>; reg = <7>; clocks = <&usb>; }; pck0: pck0 { #clock-cells = <0>; reg = <8>; clocks = <&prog0>; }; pck1: pck1 { #clock-cells = <0>; reg = <9>; clocks = <&prog1>; }; pck2: pck2 { #clock-cells = <0>; reg = <10>; clocks = <&prog2>; }; }; periphck { compatible = "atmel,at91sam9x5-clk-peripheral"; #address-cells = <1>; #size-cells = <0>; clocks = <&mck>; dbgu_clk: dbgu_clk { #clock-cells = <0>; reg = <2>; }; pioA_clk: pioA_clk { #clock-cells = <0>; reg = <6>; }; pioB_clk: pioB_clk { #clock-cells = <0>; reg = <7>; }; pioC_clk: pioC_clk { #clock-cells = <0>; reg = <8>; }; pioD_clk: pioD_clk { #clock-cells = <0>; reg = <9>; }; pioE_clk: pioE_clk { #clock-cells = <0>; reg = <10>; }; usart0_clk: usart0_clk { #clock-cells = <0>; reg = <12>; atmel,clk-output-range = <0 66000000>; }; usart1_clk: usart1_clk { #clock-cells = <0>; reg = <13>; atmel,clk-output-range = <0 66000000>; }; usart2_clk: usart2_clk { #clock-cells = <0>; reg = <14>; atmel,clk-output-range = <0 66000000>; }; usart3_clk: usart3_clk { #clock-cells = <0>; reg = <15>; atmel,clk-output-range = <0 66000000>; }; twi0_clk: twi0_clk { reg = <18>; #clock-cells = <0>; atmel,clk-output-range = <0 16625000>; }; twi1_clk: twi1_clk { #clock-cells = <0>; reg = <19>; atmel,clk-output-range = <0 16625000>; }; twi2_clk: twi2_clk { #clock-cells = <0>; reg = <20>; atmel,clk-output-range = <0 16625000>; }; mci0_clk: mci0_clk { #clock-cells = <0>; reg = <21>; }; mci1_clk: mci1_clk { #clock-cells = <0>; reg = <22>; }; spi0_clk: spi0_clk { #clock-cells = <0>; reg = <24>; atmel,clk-output-range = <0 133000000>; }; spi1_clk: spi1_clk { #clock-cells = <0>; reg = <25>; atmel,clk-output-range = <0 133000000>; }; tcb0_clk: tcb0_clk { #clock-cells = <0>; reg = <26>; atmel,clk-output-range = <0 133000000>; }; pwm_clk: pwm_clk { #clock-cells = <0>; reg = <28>; }; adc_clk: adc_clk { #clock-cells = <0>; reg = <29>; atmel,clk-output-range = <0 66000000>; }; dma0_clk: dma0_clk { #clock-cells = <0>; reg = <30>; }; dma1_clk: dma1_clk { #clock-cells = <0>; reg = <31>; }; uhphs_clk: uhphs_clk { #clock-cells = <0>; reg = <32>; }; udphs_clk: udphs_clk { #clock-cells = <0>; reg = <33>; }; isi_clk: isi_clk { #clock-cells = <0>; reg = <37>; }; ssc0_clk: ssc0_clk { #clock-cells = <0>; reg = <38>; atmel,clk-output-range = <0 66000000>; }; ssc1_clk: ssc1_clk { #clock-cells = <0>; reg = <39>; atmel,clk-output-range = <0 66000000>; }; sha_clk: sha_clk { #clock-cells = <0>; reg = <42>; }; aes_clk: aes_clk { #clock-cells = <0>; reg = <43>; }; tdes_clk: tdes_clk { #clock-cells = <0>; reg = <44>; }; trng_clk: trng_clk { #clock-cells = <0>; reg = <45>; }; fuse_clk: fuse_clk { #clock-cells = <0>; reg = <48>; }; }; }; rstc@fffffe00 { Loading @@ -683,6 +1052,7 @@ compatible = "atmel,at91sam9260-pit"; reg = <0xfffffe30 0xf>; interrupts = <3 IRQ_TYPE_LEVEL_HIGH 5>; clocks = <&mck>; }; watchdog@fffffe40 { Loading @@ -705,6 +1075,8 @@ reg = <0x00500000 0x100000 0xf8030000 0x4000>; interrupts = <33 IRQ_TYPE_LEVEL_HIGH 2>; clocks = <&udphs_clk>, <&utmi>; clock-names = "pclk", "hclk"; status = "disabled"; ep0 { Loading Loading @@ -817,6 +1189,9 @@ compatible = "atmel,at91rm9200-ohci", "usb-ohci"; reg = <0x00600000 0x100000>; interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>; clocks = <&usb>, <&uhphs_clk>, <&udphs_clk>, <&uhpck>; clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck"; status = "disabled"; }; Loading @@ -824,6 +1199,8 @@ compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; reg = <0x00700000 0x100000>; interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>; clocks = <&usb>, <&uhphs_clk>, <&uhpck>; clock-names = "usb_clk", "ehci_clk", "uhpck"; status = "disabled"; }; Loading arch/arm/boot/dts/sama5d3_can.dtsi +20 −0 Original line number Diff line number Diff line Loading @@ -32,12 +32,30 @@ }; pmc: pmc@fffffc00 { periphck { can0_clk: can0_clk { #clock-cells = <0>; reg = <40>; atmel,clk-output-range = <0 66000000>; }; can1_clk: can0_clk { #clock-cells = <0>; reg = <41>; atmel,clk-output-range = <0 66000000>; }; }; }; can0: can@f000c000 { compatible = "atmel,at91sam9x5-can"; reg = <0xf000c000 0x300>; interrupts = <40 IRQ_TYPE_LEVEL_HIGH 3>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_can0_rx_tx>; clocks = <&can0_clk>; clock-names = "can_clk"; status = "disabled"; }; Loading @@ -47,6 +65,8 @@ interrupts = <41 IRQ_TYPE_LEVEL_HIGH 3>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_can1_rx_tx>; clocks = <&can1_clk>; clock-names = "can_clk"; status = "disabled"; }; }; Loading arch/arm/boot/dts/sama5d3_emac.dtsi +11 −0 Original line number Diff line number Diff line Loading @@ -31,12 +31,23 @@ }; }; pmc: pmc@fffffc00 { periphck { macb1_clk: macb1_clk { #clock-cells = <0>; reg = <35>; }; }; }; macb1: ethernet@f802c000 { compatible = "cdns,at32ap7000-macb", "cdns,macb"; reg = <0xf802c000 0x100>; interrupts = <35 IRQ_TYPE_LEVEL_HIGH 3>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_macb1_rmii>; clocks = <&macb1_clk>, <&macb1_clk>; clock-names = "hclk", "pclk"; status = "disabled"; }; }; Loading arch/arm/boot/dts/sama5d3_gmac.dtsi +11 −0 Original line number Diff line number Diff line Loading @@ -64,12 +64,23 @@ }; }; pmc: pmc@fffffc00 { periphck { macb0_clk: macb0_clk { #clock-cells = <0>; reg = <34>; }; }; }; macb0: ethernet@f0028000 { compatible = "cdns,pc302-gem", "cdns,gem"; reg = <0xf0028000 0x100>; interrupts = <34 IRQ_TYPE_LEVEL_HIGH 3>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_macb0_data_rgmii &pinctrl_macb0_signal_rgmii>; clocks = <&macb0_clk>, <&macb0_clk>; clock-names = "hclk", "pclk"; status = "disabled"; }; }; Loading arch/arm/boot/dts/sama5d3_lcd.dtsi +17 −0 Original line number Diff line number Diff line Loading @@ -50,6 +50,23 @@ }; }; }; pmc: pmc@fffffc00 { periphck { lcdc_clk: lcdc_clk { #clock-cells = <0>; reg = <36>; }; }; systemck { lcdck: lcdck { #clock-cells = <0>; reg = <3>; clocks = <&mck>; }; }; }; }; }; }; Loading
arch/arm/boot/dts/sama5d3.dtsi +378 −1 Original line number Diff line number Diff line Loading @@ -13,6 +13,7 @@ #include <dt-bindings/pinctrl/at91.h> #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/clk/at91.h> / { model = "Atmel SAMA5D3 family SoC"; Loading Loading @@ -56,6 +57,14 @@ reg = <0x20000000 0x8000000>; }; clocks { adc_op_clk: adc_op_clk{ compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <20000000>; }; }; ahb { compatible = "simple-bus"; #address-cells = <1>; Loading @@ -79,6 +88,8 @@ status = "disabled"; #address-cells = <1>; #size-cells = <0>; clocks = <&mci0_clk>; clock-names = "mci_clk"; }; spi0: spi@f0004000 { Loading @@ -92,6 +103,8 @@ dma-names = "tx", "rx"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_spi0>; clocks = <&spi0_clk>; clock-names = "spi_clk"; status = "disabled"; }; Loading @@ -101,6 +114,8 @@ interrupts = <38 IRQ_TYPE_LEVEL_HIGH 4>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; clocks = <&ssc0_clk>; clock-names = "pclk"; status = "disabled"; }; Loading @@ -108,6 +123,8 @@ compatible = "atmel,at91sam9x5-tcb"; reg = <0xf0010000 0x100>; interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>; clocks = <&tcb0_clk>; clock-names = "t0_clk"; }; i2c0: i2c@f0014000 { Loading @@ -121,6 +138,7 @@ pinctrl-0 = <&pinctrl_i2c0>; #address-cells = <1>; #size-cells = <0>; clocks = <&twi0_clk>; status = "disabled"; }; Loading @@ -135,6 +153,7 @@ pinctrl-0 = <&pinctrl_i2c1>; #address-cells = <1>; #size-cells = <0>; clocks = <&twi1_clk>; status = "disabled"; }; Loading @@ -144,6 +163,8 @@ interrupts = <12 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart0>; clocks = <&usart0_clk>; clock-names = "usart"; status = "disabled"; }; Loading @@ -153,6 +174,8 @@ interrupts = <13 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart1>; clocks = <&usart1_clk>; clock-names = "usart"; status = "disabled"; }; Loading @@ -174,6 +197,8 @@ status = "disabled"; #address-cells = <1>; #size-cells = <0>; clocks = <&mci1_clk>; clock-names = "mci_clk"; }; spi1: spi@f8008000 { Loading @@ -187,6 +212,8 @@ dma-names = "tx", "rx"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_spi1>; clocks = <&spi1_clk>; clock-names = "spi_clk"; status = "disabled"; }; Loading @@ -196,6 +223,8 @@ interrupts = <39 IRQ_TYPE_LEVEL_HIGH 4>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>; clocks = <&ssc1_clk>; clock-names = "pclk"; status = "disabled"; }; Loading @@ -219,6 +248,9 @@ &pinctrl_adc0_ad10 &pinctrl_adc0_ad11 >; clocks = <&adc_clk>, <&adc_op_clk>; clock-names = "adc_clk", "adc_op_clk"; atmel,adc-channel-base = <0x50>; atmel,adc-channels-used = <0xfff>; atmel,adc-drdy-mask = <0x1000000>; Loading Loading @@ -274,6 +306,7 @@ dma-names = "tx", "rx"; #address-cells = <1>; #size-cells = <0>; clocks = <&twi2_clk>; status = "disabled"; }; Loading @@ -283,6 +316,8 @@ interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart2>; clocks = <&usart2_clk>; clock-names = "usart"; status = "disabled"; }; Loading @@ -292,6 +327,8 @@ interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart3>; clocks = <&usart3_clk>; clock-names = "usart"; status = "disabled"; }; Loading @@ -318,6 +355,8 @@ reg = <0xffffe600 0x200>; interrupts = <30 IRQ_TYPE_LEVEL_HIGH 0>; #dma-cells = <2>; clocks = <&dma0_clk>; clock-names = "dma_clk"; }; dma1: dma-controller@ffffe800 { Loading @@ -325,6 +364,8 @@ reg = <0xffffe800 0x200>; interrupts = <31 IRQ_TYPE_LEVEL_HIGH 0>; #dma-cells = <2>; clocks = <&dma1_clk>; clock-names = "dma_clk"; }; ramc0: ramc@ffffea00 { Loading @@ -338,6 +379,8 @@ interrupts = <2 IRQ_TYPE_LEVEL_HIGH 7>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_dbgu>; clocks = <&dbgu_clk>; clock-names = "usart"; status = "disabled"; }; Loading Loading @@ -626,6 +669,7 @@ gpio-controller; interrupt-controller; #interrupt-cells = <2>; clocks = <&pioA_clk>; }; pioB: gpio@fffff400 { Loading @@ -636,6 +680,7 @@ gpio-controller; interrupt-controller; #interrupt-cells = <2>; clocks = <&pioB_clk>; }; pioC: gpio@fffff600 { Loading @@ -646,6 +691,7 @@ gpio-controller; interrupt-controller; #interrupt-cells = <2>; clocks = <&pioC_clk>; }; pioD: gpio@fffff800 { Loading @@ -656,6 +702,7 @@ gpio-controller; interrupt-controller; #interrupt-cells = <2>; clocks = <&pioD_clk>; }; pioE: gpio@fffffa00 { Loading @@ -666,12 +713,334 @@ gpio-controller; interrupt-controller; #interrupt-cells = <2>; clocks = <&pioE_clk>; }; }; pmc: pmc@fffffc00 { compatible = "atmel,at91rm9200-pmc"; compatible = "atmel,sama5d3-pmc"; reg = <0xfffffc00 0x120>; interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; interrupt-controller; #address-cells = <1>; #size-cells = <0>; #interrupt-cells = <1>; clk32k: slck { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <32768>; }; main: mainck { compatible = "atmel,at91rm9200-clk-main"; #clock-cells = <0>; interrupt-parent = <&pmc>; interrupts = <AT91_PMC_MOSCS>; clocks = <&clk32k>; }; plla: pllack { compatible = "atmel,sama5d3-clk-pll"; #clock-cells = <0>; interrupt-parent = <&pmc>; interrupts = <AT91_PMC_LOCKA>; clocks = <&main>; reg = <0>; atmel,clk-input-range = <8000000 50000000>; #atmel,pll-clk-output-range-cells = <4>; atmel,pll-clk-output-ranges = <400000000 1000000000 0 0>; }; plladiv: plladivck { compatible = "atmel,at91sam9x5-clk-plldiv"; #clock-cells = <0>; clocks = <&plla>; }; utmi: utmick { compatible = "atmel,at91sam9x5-clk-utmi"; #clock-cells = <0>; interrupt-parent = <&pmc>; interrupts = <AT91_PMC_LOCKU>; clocks = <&main>; }; mck: masterck { compatible = "atmel,at91sam9x5-clk-master"; #clock-cells = <0>; interrupt-parent = <&pmc>; interrupts = <AT91_PMC_MCKRDY>; clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>; atmel,clk-output-range = <0 166000000>; atmel,clk-divisors = <1 2 4 3>; }; usb: usbck { compatible = "atmel,at91sam9x5-clk-usb"; #clock-cells = <0>; clocks = <&plladiv>, <&utmi>; }; prog: progck { compatible = "atmel,at91sam9x5-clk-programmable"; #address-cells = <1>; #size-cells = <0>; interrupt-parent = <&pmc>; clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>; prog0: prog0 { #clock-cells = <0>; reg = <0>; interrupts = <AT91_PMC_PCKRDY(0)>; }; prog1: prog1 { #clock-cells = <0>; reg = <1>; interrupts = <AT91_PMC_PCKRDY(1)>; }; prog2: prog2 { #clock-cells = <0>; reg = <2>; interrupts = <AT91_PMC_PCKRDY(2)>; }; }; smd: smdclk { compatible = "atmel,at91sam9x5-clk-smd"; #clock-cells = <0>; clocks = <&plladiv>, <&utmi>; }; systemck { compatible = "atmel,at91rm9200-clk-system"; #address-cells = <1>; #size-cells = <0>; ddrck: ddrck { #clock-cells = <0>; reg = <2>; clocks = <&mck>; }; smdck: smdck { #clock-cells = <0>; reg = <4>; clocks = <&smd>; }; uhpck: uhpck { #clock-cells = <0>; reg = <6>; clocks = <&usb>; }; udpck: udpck { #clock-cells = <0>; reg = <7>; clocks = <&usb>; }; pck0: pck0 { #clock-cells = <0>; reg = <8>; clocks = <&prog0>; }; pck1: pck1 { #clock-cells = <0>; reg = <9>; clocks = <&prog1>; }; pck2: pck2 { #clock-cells = <0>; reg = <10>; clocks = <&prog2>; }; }; periphck { compatible = "atmel,at91sam9x5-clk-peripheral"; #address-cells = <1>; #size-cells = <0>; clocks = <&mck>; dbgu_clk: dbgu_clk { #clock-cells = <0>; reg = <2>; }; pioA_clk: pioA_clk { #clock-cells = <0>; reg = <6>; }; pioB_clk: pioB_clk { #clock-cells = <0>; reg = <7>; }; pioC_clk: pioC_clk { #clock-cells = <0>; reg = <8>; }; pioD_clk: pioD_clk { #clock-cells = <0>; reg = <9>; }; pioE_clk: pioE_clk { #clock-cells = <0>; reg = <10>; }; usart0_clk: usart0_clk { #clock-cells = <0>; reg = <12>; atmel,clk-output-range = <0 66000000>; }; usart1_clk: usart1_clk { #clock-cells = <0>; reg = <13>; atmel,clk-output-range = <0 66000000>; }; usart2_clk: usart2_clk { #clock-cells = <0>; reg = <14>; atmel,clk-output-range = <0 66000000>; }; usart3_clk: usart3_clk { #clock-cells = <0>; reg = <15>; atmel,clk-output-range = <0 66000000>; }; twi0_clk: twi0_clk { reg = <18>; #clock-cells = <0>; atmel,clk-output-range = <0 16625000>; }; twi1_clk: twi1_clk { #clock-cells = <0>; reg = <19>; atmel,clk-output-range = <0 16625000>; }; twi2_clk: twi2_clk { #clock-cells = <0>; reg = <20>; atmel,clk-output-range = <0 16625000>; }; mci0_clk: mci0_clk { #clock-cells = <0>; reg = <21>; }; mci1_clk: mci1_clk { #clock-cells = <0>; reg = <22>; }; spi0_clk: spi0_clk { #clock-cells = <0>; reg = <24>; atmel,clk-output-range = <0 133000000>; }; spi1_clk: spi1_clk { #clock-cells = <0>; reg = <25>; atmel,clk-output-range = <0 133000000>; }; tcb0_clk: tcb0_clk { #clock-cells = <0>; reg = <26>; atmel,clk-output-range = <0 133000000>; }; pwm_clk: pwm_clk { #clock-cells = <0>; reg = <28>; }; adc_clk: adc_clk { #clock-cells = <0>; reg = <29>; atmel,clk-output-range = <0 66000000>; }; dma0_clk: dma0_clk { #clock-cells = <0>; reg = <30>; }; dma1_clk: dma1_clk { #clock-cells = <0>; reg = <31>; }; uhphs_clk: uhphs_clk { #clock-cells = <0>; reg = <32>; }; udphs_clk: udphs_clk { #clock-cells = <0>; reg = <33>; }; isi_clk: isi_clk { #clock-cells = <0>; reg = <37>; }; ssc0_clk: ssc0_clk { #clock-cells = <0>; reg = <38>; atmel,clk-output-range = <0 66000000>; }; ssc1_clk: ssc1_clk { #clock-cells = <0>; reg = <39>; atmel,clk-output-range = <0 66000000>; }; sha_clk: sha_clk { #clock-cells = <0>; reg = <42>; }; aes_clk: aes_clk { #clock-cells = <0>; reg = <43>; }; tdes_clk: tdes_clk { #clock-cells = <0>; reg = <44>; }; trng_clk: trng_clk { #clock-cells = <0>; reg = <45>; }; fuse_clk: fuse_clk { #clock-cells = <0>; reg = <48>; }; }; }; rstc@fffffe00 { Loading @@ -683,6 +1052,7 @@ compatible = "atmel,at91sam9260-pit"; reg = <0xfffffe30 0xf>; interrupts = <3 IRQ_TYPE_LEVEL_HIGH 5>; clocks = <&mck>; }; watchdog@fffffe40 { Loading @@ -705,6 +1075,8 @@ reg = <0x00500000 0x100000 0xf8030000 0x4000>; interrupts = <33 IRQ_TYPE_LEVEL_HIGH 2>; clocks = <&udphs_clk>, <&utmi>; clock-names = "pclk", "hclk"; status = "disabled"; ep0 { Loading Loading @@ -817,6 +1189,9 @@ compatible = "atmel,at91rm9200-ohci", "usb-ohci"; reg = <0x00600000 0x100000>; interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>; clocks = <&usb>, <&uhphs_clk>, <&udphs_clk>, <&uhpck>; clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck"; status = "disabled"; }; Loading @@ -824,6 +1199,8 @@ compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; reg = <0x00700000 0x100000>; interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>; clocks = <&usb>, <&uhphs_clk>, <&uhpck>; clock-names = "usb_clk", "ehci_clk", "uhpck"; status = "disabled"; }; Loading
arch/arm/boot/dts/sama5d3_can.dtsi +20 −0 Original line number Diff line number Diff line Loading @@ -32,12 +32,30 @@ }; pmc: pmc@fffffc00 { periphck { can0_clk: can0_clk { #clock-cells = <0>; reg = <40>; atmel,clk-output-range = <0 66000000>; }; can1_clk: can0_clk { #clock-cells = <0>; reg = <41>; atmel,clk-output-range = <0 66000000>; }; }; }; can0: can@f000c000 { compatible = "atmel,at91sam9x5-can"; reg = <0xf000c000 0x300>; interrupts = <40 IRQ_TYPE_LEVEL_HIGH 3>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_can0_rx_tx>; clocks = <&can0_clk>; clock-names = "can_clk"; status = "disabled"; }; Loading @@ -47,6 +65,8 @@ interrupts = <41 IRQ_TYPE_LEVEL_HIGH 3>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_can1_rx_tx>; clocks = <&can1_clk>; clock-names = "can_clk"; status = "disabled"; }; }; Loading
arch/arm/boot/dts/sama5d3_emac.dtsi +11 −0 Original line number Diff line number Diff line Loading @@ -31,12 +31,23 @@ }; }; pmc: pmc@fffffc00 { periphck { macb1_clk: macb1_clk { #clock-cells = <0>; reg = <35>; }; }; }; macb1: ethernet@f802c000 { compatible = "cdns,at32ap7000-macb", "cdns,macb"; reg = <0xf802c000 0x100>; interrupts = <35 IRQ_TYPE_LEVEL_HIGH 3>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_macb1_rmii>; clocks = <&macb1_clk>, <&macb1_clk>; clock-names = "hclk", "pclk"; status = "disabled"; }; }; Loading
arch/arm/boot/dts/sama5d3_gmac.dtsi +11 −0 Original line number Diff line number Diff line Loading @@ -64,12 +64,23 @@ }; }; pmc: pmc@fffffc00 { periphck { macb0_clk: macb0_clk { #clock-cells = <0>; reg = <34>; }; }; }; macb0: ethernet@f0028000 { compatible = "cdns,pc302-gem", "cdns,gem"; reg = <0xf0028000 0x100>; interrupts = <34 IRQ_TYPE_LEVEL_HIGH 3>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_macb0_data_rgmii &pinctrl_macb0_signal_rgmii>; clocks = <&macb0_clk>, <&macb0_clk>; clock-names = "hclk", "pclk"; status = "disabled"; }; }; Loading
arch/arm/boot/dts/sama5d3_lcd.dtsi +17 −0 Original line number Diff line number Diff line Loading @@ -50,6 +50,23 @@ }; }; }; pmc: pmc@fffffc00 { periphck { lcdc_clk: lcdc_clk { #clock-cells = <0>; reg = <36>; }; }; systemck { lcdck: lcdck { #clock-cells = <0>; reg = <3>; clocks = <&mck>; }; }; }; }; }; };