Commit d282fa3c authored by Marc Zyngier's avatar Marc Zyngier
Browse files

KVM: arm64: Handle trap of tagged Set/Way CMOs 



We appear to have missed the Set/Way CMOs when adding MTE support.
Not that we really expect anyone to use them, but you never know
what stupidity some people can come up with...

Treat these mostly like we deal with the classic S/W CMOs, only
with an additional check that MTE really is enabled.

Signed-off-by: default avatarMarc Zyngier <maz@kernel.org>
Reviewed-by: default avatarCornelia Huck <cohuck@redhat.com>
Reviewed-by: default avatarSteven Price <steven.price@arm.com>
Reviewed-by: default avatarOliver Upton <oliver.upton@linux.dev>
Link: https://lore.kernel.org/r/20230515204601.1270428-3-maz@kernel.org
parent 8d0f019e

arch/arm64/kvm/sys_regs.c

+19 −0
Original line number Diff line number Diff line
@@ -211,6 +211,19 @@ static bool access_dcsw(struct kvm_vcpu *vcpu, 
	return true;

}



static bool access_dcgsw(struct kvm_vcpu *vcpu,

			 struct sys_reg_params *p,

			 const struct sys_reg_desc *r)

{

	if (!kvm_has_mte(vcpu->kvm)) {

		kvm_inject_undefined(vcpu);

		return false;

	}



	/* Treat MTE S/W ops as we treat the classic ones: with contempt */

	return access_dcsw(vcpu, p, r);

}



static void get_access_mask(const struct sys_reg_desc *r, u64 *mask, u64 *shift)

{

	switch (r->aarch32_map) {
@@ -1756,8 +1769,14 @@ static bool access_spsr(struct kvm_vcpu *vcpu, 
 */

static const struct sys_reg_desc sys_reg_descs[] = {

	{ SYS_DESC(SYS_DC_ISW), access_dcsw },

	{ SYS_DESC(SYS_DC_IGSW), access_dcgsw },

	{ SYS_DESC(SYS_DC_IGDSW), access_dcgsw },

	{ SYS_DESC(SYS_DC_CSW), access_dcsw },

	{ SYS_DESC(SYS_DC_CGSW), access_dcgsw },

	{ SYS_DESC(SYS_DC_CGDSW), access_dcgsw },

	{ SYS_DESC(SYS_DC_CISW), access_dcsw },

	{ SYS_DESC(SYS_DC_CIGSW), access_dcgsw },

	{ SYS_DESC(SYS_DC_CIGDSW), access_dcgsw },



	DBG_BCR_BVR_WCR_WVR_EL1(0),

	DBG_BCR_BVR_WCR_WVR_EL1(1),