Commit d25c6948 authored by Tony Luck's avatar Tony Luck Committed by Borislav Petkov
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RAS/CEC: Reduce offline page threshold for Intel systems



A large scale study of memory errors on Intel systems in data centers
showed that aggressively taking pages with corrected errors offline is
the best strategy of using corrected errors as a predictor of future
uncorrected errors.

Set the threshold to "2" on Intel systems. AMD guidance is that this is
not necessary for their systems.

Signed-off-by: default avatarTony Luck <tony.luck@intel.com>
Signed-off-by: default avatarBorislav Petkov <bp@suse.de>
Reviewed-by: default avatarYazen Ghannam <yazen.ghannam@amd.com>
Link: https://lore.kernel.org/r/20220607212015.175591-1-tony.luck@intel.com
Link: https://lore.kernel.org/r/YulOZ/Eso0bwUcC4@agluck-desk3.sc.intel.com
parent 1c23f9e6
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+8 −0
Original line number Diff line number Diff line
@@ -556,6 +556,14 @@ static int __init cec_init(void)
	if (ce_arr.disabled)
		return -ENODEV;

	/*
	 * Intel systems may avoid uncorrectable errors
	 * if pages with corrected errors are aggressively
	 * taken offline.
	 */
	if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL)
		action_threshold = 2;

	ce_arr.array = (void *)get_zeroed_page(GFP_KERNEL);
	if (!ce_arr.array) {
		pr_err("Error allocating CE array page!\n");