Commit d24df8ec authored by Andy Lutomirski's avatar Andy Lutomirski Committed by Borislav Petkov
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x86/fault: Skip the AMD erratum #91 workaround on unaffected CPUs 



According to the Revision Guide for AMD Athlon™ 64 and AMD Opteron™
Processors, only early revisions of family 0xF are affected. This will
avoid unnecessarily fetching instruction bytes before sending SIGSEGV to
user programs.

Signed-off-by: default avatarAndy Lutomirski <luto@kernel.org>
Signed-off-by: default avatarBorislav Petkov <bp@suse.de>
Link: https://lkml.kernel.org/r/477173b7784bc28afb3e53d76ae5ef143917e8dd.1612924255.git.luto@kernel.org
parent 35f1c89b

arch/x86/mm/fault.c

+13 −0
Original line number Diff line number Diff line
@@ -106,6 +106,15 @@ check_prefetch_opcode(struct pt_regs *regs, unsigned char *instr, 
	}

}



static bool is_amd_k8_pre_npt(void)

{

	struct cpuinfo_x86 *c = &boot_cpu_data;



	return unlikely(IS_ENABLED(CONFIG_CPU_SUP_AMD) &&

			c->x86_vendor == X86_VENDOR_AMD &&

			c->x86 == 0xf && c->x86_model < 0x40);

}



static int

is_prefetch(struct pt_regs *regs, unsigned long error_code, unsigned long addr)

{
@@ -113,6 +122,10 @@ is_prefetch(struct pt_regs *regs, unsigned long error_code, unsigned long addr) 
	unsigned char *instr;

	int prefetch = 0;



	/* Erratum #91 affects AMD K8, pre-NPT CPUs */

	if (!is_amd_k8_pre_npt())

		return 0;



	/*

	 * If it was a exec (instruction fetch) fault on NX page, then

	 * do not ignore the fault: