Unverified Commit d1f4acb8 authored by Jungseung Lee's avatar Jungseung Lee Committed by Tudor Ambarus
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mtd: spi-nor: Fix wrong TB selection of GD25Q256 



For GD25Q256, wrong SR bit for top/bottom selection is being used.
Fix it to use appropriate bit.

Signed-off-by: default avatarJungseung Lee <js07.lee@samsung.com>
Signed-off-by: default avatarTudor Ambarus <tudor.ambarus@microchip.com>
parent adf1092f

drivers/mtd/spi-nor/spi-nor.c

+2 −1
Original line number Diff line number Diff line
@@ -2395,7 +2395,8 @@ static const struct flash_info spi_nor_ids[] = { 
	{

		"gd25q256", INFO(0xc84019, 0, 64 * 1024, 512,

			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |

			SPI_NOR_4B_OPCODES | SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)

			SPI_NOR_4B_OPCODES | SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB |

			SPI_NOR_TB_SR_BIT6)

			.fixups = &gd25q256_fixups,

	},