Commit d1f3b5e9 authored by Andi Shyti's avatar Andi Shyti
Browse files

drm/i915: Make IRQ reset and postinstall multi-gt aware 



In multi-gt systems IRQs need to be reset and enabled per GT.

This might add some redundancy when handling interrupts for
engines that might not exist in every tile, but helps to keep the
code cleaner and more understandable.

Signed-off-by: default avatarAndi Shyti <andi.shyti@linux.intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: default avatarMatt Roper <matthew.d.roper@intel.com>
Reviewed-by: default avatarAndrzej Hajda <andrzej.hajda@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230417235356.1291060-1-andi.shyti@linux.intel.com
parent 8bfbdadc

drivers/gpu/drm/i915/i915_irq.c

+11 −6
Original line number Diff line number Diff line
@@ -2762,12 +2762,15 @@ static void gen11_irq_reset(struct drm_i915_private *dev_priv) 


static void dg1_irq_reset(struct drm_i915_private *dev_priv)

{

	struct intel_gt *gt = to_gt(dev_priv);

	struct intel_uncore *uncore = gt->uncore;

	struct intel_uncore *uncore = &dev_priv->uncore;

	struct intel_gt *gt;

	unsigned int i;



	dg1_master_intr_disable(dev_priv->uncore.regs);



	for_each_gt(gt, dev_priv, i)

		gen11_gt_irq_reset(gt);



	gen11_display_irq_reset(dev_priv);



	GEN3_IRQ_RESET(uncore, GEN11_GU_MISC_);
@@ -3425,10 +3428,12 @@ static void gen11_irq_postinstall(struct drm_i915_private *dev_priv) 


static void dg1_irq_postinstall(struct drm_i915_private *dev_priv)

{

	struct intel_gt *gt = to_gt(dev_priv);

	struct intel_uncore *uncore = gt->uncore;

	struct intel_uncore *uncore = &dev_priv->uncore;

	u32 gu_misc_masked = GEN11_GU_MISC_GSE;

	struct intel_gt *gt;

	unsigned int i;



	for_each_gt(gt, dev_priv, i)

		gen11_gt_irq_postinstall(gt);



	GEN3_IRQ_INIT(uncore, GEN11_GU_MISC_, ~gu_misc_masked, gu_misc_masked);