Commit d1ebfdd8 authored by Wyatt Wood's avatar Wyatt Wood Committed by Alex Deucher
Browse files

drm/amd/display: Unify psr feature flags 



[Why]
As it stands, psr has feature flags in dm, stream, and link. Most are
not defined well enough, and different dm layers have different uses for
these same flags.

[How]
We define a new structure called psr_settings in dc_link that will hold
the following psr feature flags:

psr_feature_enable - psr is supported
psr_allow_active - psr is currently active
psr_version - internal psr version supported
psr_frame_capture_indication_req
psr_sdp_transmit_line_num_deadline
The last two flags were moved out of the power module
for the purposes of consolidating psr flags.
Their use is already well-defined.

Psr caps reported by sink will also be stored in dc_link,
in dpcd_caps.psr_caps.

Signed-off-by: default avatarWyatt Wood <wyatt.wood@amd.com>
Reviewed-by: default avatarAnthony Koo <Anthony.Koo@amd.com>
Acked-by: default avatarRodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 44efb784

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

+20 −15
Original line number Diff line number Diff line
@@ -4330,14 +4330,10 @@ create_stream_for_sink(struct amdgpu_dm_connector *aconnector, 


	if (stream->signal == SIGNAL_TYPE_HDMI_TYPE_A)

		mod_build_hf_vsif_infopacket(stream, &stream->vsp_infopacket, false, false);

	if (stream->link->psr_feature_enabled)	{

	if (stream->link->psr_settings.psr_feature_enabled)	{

		struct dc  *core_dc = stream->link->ctx->dc;



		if (dc_is_dmcu_initialized(core_dc)) {

			struct dmcu *dmcu = core_dc->res_pool->dmcu;



			stream->psr_version = dmcu->dmcu_version.psr_version;



			//

			// should decide stream support vsc sdp colorimetry capability

			// before building vsc info packet
@@ -6824,7 +6820,7 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state, 
		}

		mutex_lock(&dm->dc_lock);

		if ((acrtc_state->update_type > UPDATE_TYPE_FAST) &&

				acrtc_state->stream->link->psr_allow_active)

				acrtc_state->stream->link->psr_settings.psr_allow_active)

			amdgpu_dm_psr_disable(acrtc_state->stream);



		dc_commit_updates_for_stream(dm->dc,
@@ -6835,12 +6831,12 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state, 
						     dc_state);



		if ((acrtc_state->update_type > UPDATE_TYPE_FAST) &&

						acrtc_state->stream->psr_version &&

						!acrtc_state->stream->link->psr_feature_enabled)

				acrtc_state->stream->link->psr_settings.psr_version != PSR_VERSION_UNSUPPORTED &&

				!acrtc_state->stream->link->psr_settings.psr_feature_enabled)

			amdgpu_dm_link_setup_psr(acrtc_state->stream);

		else if ((acrtc_state->update_type == UPDATE_TYPE_FAST) &&

						acrtc_state->stream->link->psr_feature_enabled &&

						!acrtc_state->stream->link->psr_allow_active) {

				acrtc_state->stream->link->psr_settings.psr_feature_enabled &&

				!acrtc_state->stream->link->psr_settings.psr_allow_active) {

			amdgpu_dm_psr_enable(acrtc_state->stream);

		}
@@ -7154,7 +7150,7 @@ static void amdgpu_dm_atomic_commit_tail(struct drm_atomic_state *state) 
			DRM_DEBUG_DRIVER("Atomic commit: RESET. crtc id %d:[%p]\n", acrtc->crtc_id, acrtc);

			/* i.e. reset mode */

			if (dm_old_crtc_state->stream) {

				if (dm_old_crtc_state->stream->link->psr_allow_active)

				if (dm_old_crtc_state->stream->link->psr_settings.psr_allow_active)

					amdgpu_dm_psr_disable(dm_old_crtc_state->stream);



				remove_stream(adev, acrtc, dm_old_crtc_state->stream);
@@ -8603,8 +8599,17 @@ static void amdgpu_dm_set_psr_caps(struct dc_link *link) 
		return;

	if (dm_helpers_dp_read_dpcd(NULL, link, DP_PSR_SUPPORT,

					dpcd_data, sizeof(dpcd_data))) {

		link->psr_feature_enabled = dpcd_data[0] ? true:false;

		DRM_INFO("PSR support:%d\n", link->psr_feature_enabled);

		link->dpcd_caps.psr_caps.psr_version = dpcd_data[0];



		if (dpcd_data[0] == 0) {

			link->psr_settings.psr_version = PSR_VERSION_UNSUPPORTED;

			link->psr_settings.psr_feature_enabled = false;

		} else {

			link->psr_settings.psr_version = PSR_VERSION_1;

			link->psr_settings.psr_feature_enabled = true;

		}



		DRM_INFO("PSR support:%d\n", link->psr_settings.psr_feature_enabled);

	}

}
@@ -8628,7 +8633,7 @@ static bool amdgpu_dm_link_setup_psr(struct dc_stream_state *stream) 
	link = stream->link;

	dc = link->ctx->dc;



	psr_config.psr_version = dc->res_pool->dmcu->dmcu_version.psr_version;

	psr_config.psr_version = link->dpcd_caps.psr_caps.psr_version;



	if (psr_config.psr_version > 0) {

		psr_config.psr_exit_link_training_required = 0x1;
@@ -8640,7 +8645,7 @@ static bool amdgpu_dm_link_setup_psr(struct dc_stream_state *stream) 
		ret = dc_link_setup_psr(link, stream, &psr_config, &psr_context);



	}

	DRM_DEBUG_DRIVER("PSR link: %d\n",	link->psr_feature_enabled);

	DRM_DEBUG_DRIVER("PSR link: %d\n",	link->psr_settings.psr_feature_enabled);



	return ret;

}

drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c

+1 −1
Original line number Diff line number Diff line
@@ -90,7 +90,7 @@ void clk_mgr_exit_optimized_pwr_state(const struct dc *dc, struct clk_mgr *clk_m 
		dc->hwss.exit_optimized_pwr_state(dc, dc->current_state);



	if (edp_link) {

		clk_mgr->psr_allow_active_cache = edp_link->psr_allow_active;

		clk_mgr->psr_allow_active_cache = edp_link->psr_settings.psr_allow_active;

		dc_link_set_psr_allow_active(edp_link, false, false);

	}

drivers/gpu/drm/amd/display/dc/core/dc.c

+2 −0
Original line number Diff line number Diff line
@@ -66,6 +66,8 @@ 


#include "dce/dce_i2c.h"



#include "dmub/inc/dmub_cmd_dal.h"



#define CTX \

	dc->ctx

drivers/gpu/drm/amd/display/dc/core/dc_link.c

+11 −8
Original line number Diff line number Diff line
@@ -46,6 +46,7 @@ 
#include "dmcu.h"

#include "hw/clk_mgr.h"

#include "dce/dmub_psr.h"

#include "dmub/inc/dmub_cmd_dal.h"



#define DC_LOGGER_INIT(logger)
@@ -1529,6 +1530,8 @@ static bool dc_link_construct(struct dc_link *link, 
	 */

	program_hpd_filter(link);



	link->psr_settings.psr_version = PSR_VERSION_UNSUPPORTED;



	return true;

device_tag_fail:

	link->link_enc->funcs->destroy(&link->link_enc);
@@ -2521,12 +2524,12 @@ bool dc_link_set_psr_allow_active(struct dc_link *link, bool allow_active, bool 
	struct dmcu *dmcu = dc->res_pool->dmcu;

	struct dmub_psr *psr = dc->res_pool->psr;



	if (psr != NULL && link->psr_feature_enabled)

	if (psr != NULL && link->psr_settings.psr_feature_enabled)

		psr->funcs->psr_enable(psr, allow_active);

	else if ((dmcu != NULL && dmcu->funcs->is_dmcu_initialized(dmcu)) && link->psr_feature_enabled)

	else if ((dmcu != NULL && dmcu->funcs->is_dmcu_initialized(dmcu)) && link->psr_settings.psr_feature_enabled)

		dmcu->funcs->set_psr_enable(dmcu, allow_active, wait);



	link->psr_allow_active = allow_active;

	link->psr_settings.psr_allow_active = allow_active;



	return true;

}
@@ -2537,9 +2540,9 @@ bool dc_link_get_psr_state(const struct dc_link *link, uint32_t *psr_state) 
	struct dmcu *dmcu = dc->res_pool->dmcu;

	struct dmub_psr *psr = dc->res_pool->psr;



	if (psr != NULL && link->psr_feature_enabled)

	if (psr != NULL && link->psr_settings.psr_feature_enabled)

		psr->funcs->psr_get_state(psr, psr_state);

	else if (dmcu != NULL && link->psr_feature_enabled)

	else if (dmcu != NULL && link->psr_settings.psr_feature_enabled)

		dmcu->funcs->get_psr_state(dmcu, psr_state);



	return true;
@@ -2710,14 +2713,14 @@ bool dc_link_setup_psr(struct dc_link *link, 
	psr_context->frame_delay = 0;



	if (psr)

		link->psr_feature_enabled = psr->funcs->psr_copy_settings(psr, link, psr_context);

		link->psr_settings.psr_feature_enabled = psr->funcs->psr_copy_settings(psr, link, psr_context);

	else

		link->psr_feature_enabled = dmcu->funcs->setup_psr(dmcu, link, psr_context);

		link->psr_settings.psr_feature_enabled = dmcu->funcs->setup_psr(dmcu, link, psr_context);



	/* psr_enabled == 0 indicates setup_psr did not succeed, but this

	 * should not happen since firmware should be running at this point

	 */

	if (link->psr_feature_enabled == 0)

	if (link->psr_settings.psr_feature_enabled == 0)

		ASSERT(0);



	return true;

drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c

+1 −1
Original line number Diff line number Diff line
@@ -2417,7 +2417,7 @@ static bool handle_hpd_irq_psr_sink(struct dc_link *link) 
{

	union dpcd_psr_configuration psr_configuration;



	if (!link->psr_feature_enabled)

	if (!link->psr_settings.psr_feature_enabled)

		return false;



	dm_helpers_dp_read_dpcd(