Loading drivers/gpu/drm/nouveau/include/nvkm/core/device.h +0 −2 Original line number Diff line number Diff line Loading @@ -60,7 +60,6 @@ struct nvkm_device { struct notifier_block nb; } acpi; struct nvkm_sec2 *sec2; struct nvkm_sw *sw; struct nvkm_engine *vic; Loading Loading @@ -104,7 +103,6 @@ struct nvkm_device_chip { #undef NVKM_LAYOUT_INST #undef NVKM_LAYOUT_ONCE int (*sec2 )(struct nvkm_device *, int idx, struct nvkm_sec2 **); int (*sw )(struct nvkm_device *, int idx, struct nvkm_sw **); int (*vic )(struct nvkm_device *, int idx, struct nvkm_engine **); }; Loading drivers/gpu/drm/nouveau/include/nvkm/core/layout.h +1 −0 Original line number Diff line number Diff line Loading @@ -43,4 +43,5 @@ NVKM_LAYOUT_INST(NVKM_ENGINE_NVDEC , struct nvkm_nvdec , nvdec, 3) NVKM_LAYOUT_INST(NVKM_ENGINE_NVENC , struct nvkm_nvenc , nvenc, 3) NVKM_LAYOUT_ONCE(NVKM_ENGINE_PM , struct nvkm_pm , pm) NVKM_LAYOUT_ONCE(NVKM_ENGINE_SEC , struct nvkm_engine , sec) NVKM_LAYOUT_ONCE(NVKM_ENGINE_SEC2 , struct nvkm_sec2 , sec2) NVKM_LAYOUT_ONCE(NVKM_ENGINE_VP , struct nvkm_engine , vp) drivers/gpu/drm/nouveau/include/nvkm/engine/sec2.h +3 −3 Original line number Diff line number Diff line Loading @@ -18,7 +18,7 @@ struct nvkm_sec2 { bool initmsg_received; }; int gp102_sec2_new(struct nvkm_device *, int, struct nvkm_sec2 **); int gp108_sec2_new(struct nvkm_device *, int, struct nvkm_sec2 **); int tu102_sec2_new(struct nvkm_device *, int, struct nvkm_sec2 **); int gp102_sec2_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_sec2 **); int gp108_sec2_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_sec2 **); int tu102_sec2_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_sec2 **); #endif drivers/gpu/drm/nouveau/nvkm/core/subdev.c +0 −1 Original line number Diff line number Diff line Loading @@ -33,7 +33,6 @@ nvkm_subdev_type[NVKM_SUBDEV_NR] = { #include <core/layout.h> #undef NVKM_LAYOUT_ONCE #undef NVKM_LAYOUT_INST [NVKM_ENGINE_SEC2 ] = "sec2", [NVKM_ENGINE_SW ] = "sw", [NVKM_ENGINE_VIC ] = "vic", }; Loading drivers/gpu/drm/nouveau/nvkm/engine/device/base.c +11 −12 Original line number Diff line number Diff line Loading @@ -2199,7 +2199,7 @@ nv132_chipset = { .gr = { 0x00000001, gp102_gr_new }, .nvdec = { 0x00000001, gm107_nvdec_new }, .nvenc = { 0x00000003, gm107_nvenc_new }, .sec2 = gp102_sec2_new, .sec2 = { 0x00000001, gp102_sec2_new }, .sw = gf100_sw_new, }; Loading Loading @@ -2233,7 +2233,7 @@ nv134_chipset = { .gr = { 0x00000001, gp104_gr_new }, .nvdec = { 0x00000001, gm107_nvdec_new }, .nvenc = { 0x00000003, gm107_nvenc_new }, .sec2 = gp102_sec2_new, .sec2 = { 0x00000001, gp102_sec2_new }, .sw = gf100_sw_new, }; Loading Loading @@ -2267,7 +2267,7 @@ nv136_chipset = { .gr = { 0x00000001, gp104_gr_new }, .nvdec = { 0x00000001, gm107_nvdec_new }, .nvenc = { 0x00000001, gm107_nvenc_new }, .sec2 = gp102_sec2_new, .sec2 = { 0x00000001, gp102_sec2_new }, .sw = gf100_sw_new, }; Loading Loading @@ -2301,7 +2301,7 @@ nv137_chipset = { .gr = { 0x00000001, gp107_gr_new }, .nvdec = { 0x00000001, gm107_nvdec_new }, .nvenc = { 0x00000003, gm107_nvenc_new }, .sec2 = gp102_sec2_new, .sec2 = { 0x00000001, gp102_sec2_new }, .sw = gf100_sw_new, }; Loading Loading @@ -2334,7 +2334,7 @@ nv138_chipset = { .fifo = { 0x00000001, gp100_fifo_new }, .gr = { 0x00000001, gp108_gr_new }, .nvdec = { 0x00000001, gm107_nvdec_new }, .sec2 = gp108_sec2_new, .sec2 = { 0x00000001, gp108_sec2_new }, .sw = gf100_sw_new, }; Loading Loading @@ -2393,7 +2393,7 @@ nv140_chipset = { .gr = { 0x00000001, gv100_gr_new }, .nvdec = { 0x00000001, gm107_nvdec_new }, .nvenc = { 0x00000007, gm107_nvenc_new }, .sec2 = gp108_sec2_new, .sec2 = { 0x00000001, gp108_sec2_new }, }; static const struct nvkm_device_chip Loading Loading @@ -2427,7 +2427,7 @@ nv162_chipset = { .gr = { 0x00000001, tu102_gr_new }, .nvdec = { 0x00000001, gm107_nvdec_new }, .nvenc = { 0x00000001, gm107_nvenc_new }, .sec2 = tu102_sec2_new, .sec2 = { 0x00000001, tu102_sec2_new }, }; static const struct nvkm_device_chip Loading Loading @@ -2461,7 +2461,7 @@ nv164_chipset = { .gr = { 0x00000001, tu102_gr_new }, .nvdec = { 0x00000003, gm107_nvdec_new }, .nvenc = { 0x00000001, gm107_nvenc_new }, .sec2 = tu102_sec2_new, .sec2 = { 0x00000001, tu102_sec2_new }, }; static const struct nvkm_device_chip Loading Loading @@ -2495,7 +2495,7 @@ nv166_chipset = { .gr = { 0x00000001, tu102_gr_new }, .nvdec = { 0x00000007, gm107_nvdec_new }, .nvenc = { 0x00000001, gm107_nvenc_new }, .sec2 = tu102_sec2_new, .sec2 = { 0x00000001, tu102_sec2_new }, }; static const struct nvkm_device_chip Loading Loading @@ -2529,7 +2529,7 @@ nv167_chipset = { .gr = { 0x00000001, tu102_gr_new }, .nvdec = { 0x00000001, gm107_nvdec_new }, .nvenc = { 0x00000001, gm107_nvenc_new }, .sec2 = tu102_sec2_new, .sec2 = { 0x00000001, tu102_sec2_new }, }; static const struct nvkm_device_chip Loading Loading @@ -2563,7 +2563,7 @@ nv168_chipset = { .gr = { 0x00000001, tu102_gr_new }, .nvdec = { 0x00000001, gm107_nvdec_new }, .nvenc = { 0x00000001, gm107_nvenc_new }, .sec2 = tu102_sec2_new, .sec2 = { 0x00000001, tu102_sec2_new }, }; static const struct nvkm_device_chip Loading Loading @@ -3162,7 +3162,6 @@ nvkm_device_ctor(const struct nvkm_device_func *func, #include <core/layout.h> #undef NVKM_LAYOUT_INST #undef NVKM_LAYOUT_ONCE _(NVKM_ENGINE_SEC2 , sec2); _(NVKM_ENGINE_SW , sw); _(NVKM_ENGINE_VIC , vic); case NVKM_ENGINE_CE1: Loading Loading
drivers/gpu/drm/nouveau/include/nvkm/core/device.h +0 −2 Original line number Diff line number Diff line Loading @@ -60,7 +60,6 @@ struct nvkm_device { struct notifier_block nb; } acpi; struct nvkm_sec2 *sec2; struct nvkm_sw *sw; struct nvkm_engine *vic; Loading Loading @@ -104,7 +103,6 @@ struct nvkm_device_chip { #undef NVKM_LAYOUT_INST #undef NVKM_LAYOUT_ONCE int (*sec2 )(struct nvkm_device *, int idx, struct nvkm_sec2 **); int (*sw )(struct nvkm_device *, int idx, struct nvkm_sw **); int (*vic )(struct nvkm_device *, int idx, struct nvkm_engine **); }; Loading
drivers/gpu/drm/nouveau/include/nvkm/core/layout.h +1 −0 Original line number Diff line number Diff line Loading @@ -43,4 +43,5 @@ NVKM_LAYOUT_INST(NVKM_ENGINE_NVDEC , struct nvkm_nvdec , nvdec, 3) NVKM_LAYOUT_INST(NVKM_ENGINE_NVENC , struct nvkm_nvenc , nvenc, 3) NVKM_LAYOUT_ONCE(NVKM_ENGINE_PM , struct nvkm_pm , pm) NVKM_LAYOUT_ONCE(NVKM_ENGINE_SEC , struct nvkm_engine , sec) NVKM_LAYOUT_ONCE(NVKM_ENGINE_SEC2 , struct nvkm_sec2 , sec2) NVKM_LAYOUT_ONCE(NVKM_ENGINE_VP , struct nvkm_engine , vp)
drivers/gpu/drm/nouveau/include/nvkm/engine/sec2.h +3 −3 Original line number Diff line number Diff line Loading @@ -18,7 +18,7 @@ struct nvkm_sec2 { bool initmsg_received; }; int gp102_sec2_new(struct nvkm_device *, int, struct nvkm_sec2 **); int gp108_sec2_new(struct nvkm_device *, int, struct nvkm_sec2 **); int tu102_sec2_new(struct nvkm_device *, int, struct nvkm_sec2 **); int gp102_sec2_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_sec2 **); int gp108_sec2_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_sec2 **); int tu102_sec2_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_sec2 **); #endif
drivers/gpu/drm/nouveau/nvkm/core/subdev.c +0 −1 Original line number Diff line number Diff line Loading @@ -33,7 +33,6 @@ nvkm_subdev_type[NVKM_SUBDEV_NR] = { #include <core/layout.h> #undef NVKM_LAYOUT_ONCE #undef NVKM_LAYOUT_INST [NVKM_ENGINE_SEC2 ] = "sec2", [NVKM_ENGINE_SW ] = "sw", [NVKM_ENGINE_VIC ] = "vic", }; Loading
drivers/gpu/drm/nouveau/nvkm/engine/device/base.c +11 −12 Original line number Diff line number Diff line Loading @@ -2199,7 +2199,7 @@ nv132_chipset = { .gr = { 0x00000001, gp102_gr_new }, .nvdec = { 0x00000001, gm107_nvdec_new }, .nvenc = { 0x00000003, gm107_nvenc_new }, .sec2 = gp102_sec2_new, .sec2 = { 0x00000001, gp102_sec2_new }, .sw = gf100_sw_new, }; Loading Loading @@ -2233,7 +2233,7 @@ nv134_chipset = { .gr = { 0x00000001, gp104_gr_new }, .nvdec = { 0x00000001, gm107_nvdec_new }, .nvenc = { 0x00000003, gm107_nvenc_new }, .sec2 = gp102_sec2_new, .sec2 = { 0x00000001, gp102_sec2_new }, .sw = gf100_sw_new, }; Loading Loading @@ -2267,7 +2267,7 @@ nv136_chipset = { .gr = { 0x00000001, gp104_gr_new }, .nvdec = { 0x00000001, gm107_nvdec_new }, .nvenc = { 0x00000001, gm107_nvenc_new }, .sec2 = gp102_sec2_new, .sec2 = { 0x00000001, gp102_sec2_new }, .sw = gf100_sw_new, }; Loading Loading @@ -2301,7 +2301,7 @@ nv137_chipset = { .gr = { 0x00000001, gp107_gr_new }, .nvdec = { 0x00000001, gm107_nvdec_new }, .nvenc = { 0x00000003, gm107_nvenc_new }, .sec2 = gp102_sec2_new, .sec2 = { 0x00000001, gp102_sec2_new }, .sw = gf100_sw_new, }; Loading Loading @@ -2334,7 +2334,7 @@ nv138_chipset = { .fifo = { 0x00000001, gp100_fifo_new }, .gr = { 0x00000001, gp108_gr_new }, .nvdec = { 0x00000001, gm107_nvdec_new }, .sec2 = gp108_sec2_new, .sec2 = { 0x00000001, gp108_sec2_new }, .sw = gf100_sw_new, }; Loading Loading @@ -2393,7 +2393,7 @@ nv140_chipset = { .gr = { 0x00000001, gv100_gr_new }, .nvdec = { 0x00000001, gm107_nvdec_new }, .nvenc = { 0x00000007, gm107_nvenc_new }, .sec2 = gp108_sec2_new, .sec2 = { 0x00000001, gp108_sec2_new }, }; static const struct nvkm_device_chip Loading Loading @@ -2427,7 +2427,7 @@ nv162_chipset = { .gr = { 0x00000001, tu102_gr_new }, .nvdec = { 0x00000001, gm107_nvdec_new }, .nvenc = { 0x00000001, gm107_nvenc_new }, .sec2 = tu102_sec2_new, .sec2 = { 0x00000001, tu102_sec2_new }, }; static const struct nvkm_device_chip Loading Loading @@ -2461,7 +2461,7 @@ nv164_chipset = { .gr = { 0x00000001, tu102_gr_new }, .nvdec = { 0x00000003, gm107_nvdec_new }, .nvenc = { 0x00000001, gm107_nvenc_new }, .sec2 = tu102_sec2_new, .sec2 = { 0x00000001, tu102_sec2_new }, }; static const struct nvkm_device_chip Loading Loading @@ -2495,7 +2495,7 @@ nv166_chipset = { .gr = { 0x00000001, tu102_gr_new }, .nvdec = { 0x00000007, gm107_nvdec_new }, .nvenc = { 0x00000001, gm107_nvenc_new }, .sec2 = tu102_sec2_new, .sec2 = { 0x00000001, tu102_sec2_new }, }; static const struct nvkm_device_chip Loading Loading @@ -2529,7 +2529,7 @@ nv167_chipset = { .gr = { 0x00000001, tu102_gr_new }, .nvdec = { 0x00000001, gm107_nvdec_new }, .nvenc = { 0x00000001, gm107_nvenc_new }, .sec2 = tu102_sec2_new, .sec2 = { 0x00000001, tu102_sec2_new }, }; static const struct nvkm_device_chip Loading Loading @@ -2563,7 +2563,7 @@ nv168_chipset = { .gr = { 0x00000001, tu102_gr_new }, .nvdec = { 0x00000001, gm107_nvdec_new }, .nvenc = { 0x00000001, gm107_nvenc_new }, .sec2 = tu102_sec2_new, .sec2 = { 0x00000001, tu102_sec2_new }, }; static const struct nvkm_device_chip Loading Loading @@ -3162,7 +3162,6 @@ nvkm_device_ctor(const struct nvkm_device_func *func, #include <core/layout.h> #undef NVKM_LAYOUT_INST #undef NVKM_LAYOUT_ONCE _(NVKM_ENGINE_SEC2 , sec2); _(NVKM_ENGINE_SW , sw); _(NVKM_ENGINE_VIC , vic); case NVKM_ENGINE_CE1: Loading