Commit d16a4f45 authored by Jesse Brandeburg's avatar Jesse Brandeburg Committed by Tony Nguyen
Browse files

ice: fix rate limit update after coalesce change



If the adaptive settings are changed with
ethtool -C ethx adaptive-rx off adaptive-tx off
then the interrupt rate limit should be maintained as a user set value,
but only if BOTH adaptive settings are off. Fix a bug where the rate
limit that was being used in adaptive mode was staying set in the
register but was not reported correctly by ethtool -c ethx. Due to long
lines include a small refactor of q_vector variable.

Fixes: b8b47723 ("ice: refactor interrupt moderation writes")
Signed-off-by: default avatarJesse Brandeburg <jesse.brandeburg@intel.com>
Tested-by: default avatarGurucharan G <gurucharanx.g@intel.com>
Signed-off-by: default avatarTony Nguyen <anthony.l.nguyen@intel.com>
parent d8eb7ad5
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+11 −6
Original line number Diff line number Diff line
@@ -3640,6 +3640,9 @@ ice_set_rc_coalesce(struct ethtool_coalesce *ec,

	switch (rc->type) {
	case ICE_RX_CONTAINER:
	{
		struct ice_q_vector *q_vector = rc->rx_ring->q_vector;

		if (ec->rx_coalesce_usecs_high > ICE_MAX_INTRL ||
		    (ec->rx_coalesce_usecs_high &&
		     ec->rx_coalesce_usecs_high < pf->hw.intrl_gran)) {
@@ -3648,22 +3651,20 @@ ice_set_rc_coalesce(struct ethtool_coalesce *ec,
				    ICE_MAX_INTRL);
			return -EINVAL;
		}
		if (ec->rx_coalesce_usecs_high != rc->rx_ring->q_vector->intrl &&
		if (ec->rx_coalesce_usecs_high != q_vector->intrl &&
		    (ec->use_adaptive_rx_coalesce || ec->use_adaptive_tx_coalesce)) {
			netdev_info(vsi->netdev, "Invalid value, %s-usecs-high cannot be changed if adaptive-tx or adaptive-rx is enabled\n",
				    c_type_str);
			return -EINVAL;
		}
		if (ec->rx_coalesce_usecs_high != rc->rx_ring->q_vector->intrl) {
			rc->rx_ring->q_vector->intrl = ec->rx_coalesce_usecs_high;
			ice_write_intrl(rc->rx_ring->q_vector,
					ec->rx_coalesce_usecs_high);
		}
		if (ec->rx_coalesce_usecs_high != q_vector->intrl)
			q_vector->intrl = ec->rx_coalesce_usecs_high;

		use_adaptive_coalesce = ec->use_adaptive_rx_coalesce;
		coalesce_usecs = ec->rx_coalesce_usecs;

		break;
	}
	case ICE_TX_CONTAINER:
		use_adaptive_coalesce = ec->use_adaptive_tx_coalesce;
		coalesce_usecs = ec->tx_coalesce_usecs;
@@ -3808,6 +3809,8 @@ __ice_set_coalesce(struct net_device *netdev, struct ethtool_coalesce *ec,

			if (ice_set_q_coalesce(vsi, ec, v_idx))
				return -EINVAL;

			ice_set_q_vector_intrl(vsi->q_vectors[v_idx]);
		}
		goto set_complete;
	}
@@ -3815,6 +3818,8 @@ __ice_set_coalesce(struct net_device *netdev, struct ethtool_coalesce *ec,
	if (ice_set_q_coalesce(vsi, ec, q_num))
		return -EINVAL;

	ice_set_q_vector_intrl(vsi->q_vectors[q_num]);

set_complete:
	return 0;
}
+2 −2
Original line number Diff line number Diff line
@@ -3121,7 +3121,7 @@ ice_vsi_rebuild_set_coalesce(struct ice_vsi *vsi,
		}

		vsi->q_vectors[i]->intrl = coalesce[i].intrl;
		ice_write_intrl(vsi->q_vectors[i], coalesce[i].intrl);
		ice_set_q_vector_intrl(vsi->q_vectors[i]);
	}

	/* the number of queue vectors increased so write whatever is in
@@ -3139,7 +3139,7 @@ ice_vsi_rebuild_set_coalesce(struct ice_vsi *vsi,
		ice_write_itr(rc, rc->itr_setting);

		vsi->q_vectors[i]->intrl = coalesce[0].intrl;
		ice_write_intrl(vsi->q_vectors[i], coalesce[0].intrl);
		ice_set_q_vector_intrl(vsi->q_vectors[i]);
	}
}