Commit d15dfd31 authored by Catalin Marinas's avatar Catalin Marinas Committed by Will Deacon
Browse files

arm64: mte: Map hotplugged memory as Normal Tagged 



In a system supporting MTE, the linear map must allow reading/writing
allocation tags by setting the memory type as Normal Tagged. Currently,
this is only handled for memory present at boot. Hotplugged memory uses
Normal non-Tagged memory.

Introduce pgprot_mhp() for hotplugged memory and use it in
add_memory_resource(). The arm64 code maps pgprot_mhp() to
pgprot_tagged().

Note that ZONE_DEVICE memory should not be mapped as Tagged and
therefore setting the memory type in arch_add_memory() is not feasible.

Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
Fixes: 0178dc76 ("arm64: mte: Use Normal Tagged attributes for the linear map")
Reported-by: default avatarPatrick Daly <pdaly@codeaurora.org>
Tested-by: default avatarPatrick Daly <pdaly@codeaurora.org>
Link: https://lore.kernel.org/r/1614745263-27827-1-git-send-email-pdaly@codeaurora.org


Cc: <stable@vger.kernel.org> # 5.10.x
Cc: Will Deacon <will@kernel.org>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Vincenzo Frascino <vincenzo.frascino@arm.com>
Cc: David Hildenbrand <david@redhat.com>
Reviewed-by: default avatarDavid Hildenbrand <david@redhat.com>
Reviewed-by: default avatarVincenzo Frascino <vincenzo.frascino@arm.com>
Reviewed-by: default avatarAnshuman Khandual <anshuman.khandual@arm.com>
Link: https://lore.kernel.org/r/20210309122601.5543-1-catalin.marinas@arm.com


Signed-off-by: default avatarWill Deacon <will@kernel.org>
parent 86c83365

arch/arm64/include/asm/pgtable-prot.h

+0 −1
Original line number Diff line number Diff line
@@ -66,7 +66,6 @@ extern bool arm64_use_ng_mappings; 
#define _PAGE_DEFAULT		(_PROT_DEFAULT | PTE_ATTRINDX(MT_NORMAL))



#define PAGE_KERNEL		__pgprot(PROT_NORMAL)

#define PAGE_KERNEL_TAGGED	__pgprot(PROT_NORMAL_TAGGED)

#define PAGE_KERNEL_RO		__pgprot((PROT_NORMAL & ~PTE_WRITE) | PTE_RDONLY)

#define PAGE_KERNEL_ROX		__pgprot((PROT_NORMAL & ~(PTE_WRITE | PTE_PXN)) | PTE_RDONLY)

#define PAGE_KERNEL_EXEC	__pgprot(PROT_NORMAL & ~PTE_PXN)

arch/arm64/include/asm/pgtable.h

+3 −0
Original line number Diff line number Diff line
@@ -486,6 +486,9 @@ static inline pmd_t pmd_mkdevmap(pmd_t pmd) 
	__pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_NORMAL_NC) | PTE_PXN | PTE_UXN)

#define pgprot_device(prot) \

	__pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_DEVICE_nGnRE) | PTE_PXN | PTE_UXN)

#define pgprot_tagged(prot) \

	__pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_NORMAL_TAGGED))

#define pgprot_mhp	pgprot_tagged

/*

 * DMA allocations for non-coherent devices use what the Arm architecture calls

 * "Normal non-cacheable" memory, which permits speculation, unaligned accesses

arch/arm64/mm/mmu.c

+2 −1
Original line number Diff line number Diff line
@@ -512,7 +512,8 @@ static void __init map_mem(pgd_t *pgdp) 
		 * if MTE is present. Otherwise, it has the same attributes as

		 * PAGE_KERNEL.

		 */

		__map_memblock(pgdp, start, end, PAGE_KERNEL_TAGGED, flags);

		__map_memblock(pgdp, start, end, pgprot_tagged(PAGE_KERNEL),

			       flags);

	}



	/*

include/linux/pgtable.h

+4 −0
Original line number Diff line number Diff line
@@ -904,6 +904,10 @@ static inline void ptep_modify_prot_commit(struct vm_area_struct *vma, 
#define pgprot_device pgprot_noncached

#endif



#ifndef pgprot_mhp

#define pgprot_mhp(prot)	(prot)

#endif



#ifdef CONFIG_MMU

#ifndef pgprot_modify

#define pgprot_modify pgprot_modify

mm/memory_hotplug.c

+1 −1
Original line number Diff line number Diff line
@@ -1072,7 +1072,7 @@ static int online_memory_block(struct memory_block *mem, void *arg) 
 */

int __ref add_memory_resource(int nid, struct resource *res, mhp_t mhp_flags)

{

	struct mhp_params params = { .pgprot = PAGE_KERNEL };

	struct mhp_params params = { .pgprot = pgprot_mhp(PAGE_KERNEL) };

	u64 start, size;

	bool new_node = false;

	int ret;