Commit d15ddc0d authored by Bibo Mao's avatar Bibo Mao Committed by Xianglai Li
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LoongArch: KVM: Add cpucfg area for kvm hypervisor 

LoongArch inclusion
category: bugfix
bugzilla: https://gitee.com/openeuler/kernel/issues/I9BTWW



------------------------------------------

Instruction cpucfg can be used to get processor features. And there
is trap exception when it is executed in VM mode, and also it is
to provide cpu features to VM. On real hardware cpucfg area 0 - 20
is used.  Here one specified area 0x40000000 -- 0x400000ff is used
for KVM hypervisor to privide PV features, and the area can be extended
for other hypervisors in future. This area will never be used for
real HW, it is only used by software.

Signed-off-by: default avatarBibo Mao <maobibo@loongson.cn>
Signed-off-by: default avatarXianglai Li <lixianglai@loongson.cn>
parent 83f2564a

arch/loongarch/include/asm/inst.h

+1 −0
Original line number Diff line number Diff line
@@ -65,6 +65,7 @@ enum reg2_op { 
	revbd_op	= 0x0f,

	revh2w_op	= 0x10,

	revhd_op	= 0x11,

	cpucfg_op	= 0x1b,

	iocsrrdb_op     = 0x19200,

	iocsrrdh_op     = 0x19201,

	iocsrrdw_op     = 0x19202,

arch/loongarch/include/asm/loongarch.h

+10 −0
Original line number Diff line number Diff line
@@ -158,6 +158,16 @@ 
#define  CPUCFG48_VFPU_CG		BIT(2)

#define  CPUCFG48_RAM_CG		BIT(3)



/*

 * cpucfg index area: 0x40000000 -- 0x400000ff

 * SW emulation for KVM hypervirsor

 */

#define CPUCFG_KVM_BASE			0x40000000UL

#define CPUCFG_KVM_SIZE			0x100

#define CPUCFG_KVM_SIG			CPUCFG_KVM_BASE

#define  KVM_SIGNATURE			"KVM\0"

#define CPUCFG_KVM_FEATURE		(CPUCFG_KVM_BASE + 4)



#ifndef __ASSEMBLY__



/* CSR */

arch/loongarch/kvm/exit.c

+43 −16
Original line number Diff line number Diff line
@@ -206,10 +206,50 @@ int kvm_emu_idle(struct kvm_vcpu *vcpu) 
	return EMULATE_DONE;

}



static int kvm_trap_handle_gspr(struct kvm_vcpu *vcpu)

static int kvm_emu_cpucfg(struct kvm_vcpu *vcpu, larch_inst inst)

{

	int rd, rj;

	unsigned int index;

	unsigned long plv;



	rd = inst.reg2_format.rd;

	rj = inst.reg2_format.rj;

	++vcpu->stat.cpucfg_exits;

	index = vcpu->arch.gprs[rj];



	/*

	 * By LoongArch Reference Manual 2.2.10.5

	 * Return value is 0 for undefined cpucfg index

	 *

	 * Disable preemption since hw gcsr is accessed

	 */

	preempt_disable();

	plv = kvm_read_hw_gcsr(LOONGARCH_CSR_CRMD) >> CSR_CRMD_PLV_SHIFT;

	switch (index) {

	case 0 ... (KVM_MAX_CPUCFG_REGS - 1):

		vcpu->arch.gprs[rd] = vcpu->arch.cpucfg[index];

		break;

	case CPUCFG_KVM_SIG:

		/*

		 * Cpucfg emulation between 0x40000000 -- 0x400000ff

		 * Return value with 0 if executed in user mode

		 */

		if ((plv & CSR_CRMD_PLV) == PLV_KERN)

			vcpu->arch.gprs[rd] = *(unsigned int *)KVM_SIGNATURE;

		else

			vcpu->arch.gprs[rd] = 0;

		break;

	default:

		vcpu->arch.gprs[rd] = 0;

		break;

	}



	preempt_enable();

	return EMULATE_DONE;

}



static int kvm_trap_handle_gspr(struct kvm_vcpu *vcpu)

{

	unsigned long curr_pc;

	larch_inst inst;

	enum emulation_result er = EMULATE_DONE;
@@ -224,21 +264,8 @@ static int kvm_trap_handle_gspr(struct kvm_vcpu *vcpu) 
	er = EMULATE_FAIL;

	switch (((inst.word >> 24) & 0xff)) {

	case 0x0: /* CPUCFG GSPR */

		if (inst.reg2_format.opcode == 0x1B) {

			rd = inst.reg2_format.rd;

			rj = inst.reg2_format.rj;

			++vcpu->stat.cpucfg_exits;

			index = vcpu->arch.gprs[rj];

			er = EMULATE_DONE;

			/*

			 * By LoongArch Reference Manual 2.2.10.5

			 * return value is 0 for undefined cpucfg index

			 */

			if (index < KVM_MAX_CPUCFG_REGS)

				vcpu->arch.gprs[rd] = vcpu->arch.cpucfg[index];

			else

				vcpu->arch.gprs[rd] = 0;

		}

		if (inst.reg2_format.opcode == cpucfg_op)

			er = kvm_emu_cpucfg(vcpu, inst);

		break;

	case 0x4: /* CSR{RD,WR,XCHG} GSPR */

		er = kvm_handle_csr(vcpu, inst);