Commit d0f3ad23 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'spi-v6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi 

Pull spi updates from Mark Brown:
 "A busy enough release, but not for the core which has only seen very
  small updates. The biggest addition is the readdition of support for
  detailed configuration of the timings around chip selects. That had
  been removed for lack of use but there's been applications found for
  it on Atmel systems. Otherwise the updates are mostly feature
  additions and cleanups to existing drivers.

  Summary:

   - Provide a helper for getting device match data in a way that
     abstracts away which firmware interface is being used.

   - Re-add the spi_set_cs_timing() API for detailed configuration of
     the timing around chip select and support it on Atmel.

   - Support for MediaTek MT7986, Microchip PCI1xxxx, Nuvoton WPCM450
     FIU and Socionext F_OSPI"

* tag 'spi-v6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (66 commits)
  spi: dt-bindings: Convert Synquacer SPI to DT schema
  spi: spi-gpio: Don't set MOSI as an input if not 3WIRE mode
  spi: spi-mtk-nor: Add recovery mechanism for dma read timeout
  spi: spi-fsl-lpspi: add num-cs binding for lpspi
  spi: spi-fsl-lpspi: support multiple cs for lpspi
  spi: mtk-snfi: Add snfi support for MT7986 IC
  spi: spidev: mask SPI_CS_HIGH in SPI_IOC_RD_MODE
  spi: cadence-quadspi: Add minimum operable clock rate warning to baudrate divisor calculation
  spi: microchip: pci1xxxx: Add suspend and resume support for PCI1XXXX SPI driver
  spi: dt-bindings: nuvoton,wpcm450-fiu: Fix warning in example (missing reg property)
  spi: dt-bindings: nuvoton,wpcm450-fiu: Fix error in example (bogus include)
  spi: mediatek: Enable irq when pdata is ready
  spi: spi-mtk-nor: Unify write buffer on/off
  spi: intel: Add support for SFDP opcode
  spi: intel: Take possible chip address into account in intel_spi_read/write_reg()
  spi: intel: Implement adjust_op_size()
  spi: intel: Use ->replacement_op in intel_spi_hw_cycle()
  spi: cadence: Drop obsolete dependency on COMPILE_TEST
  spi: Add Nuvoton WPCM450 Flash Interface Unit (FIU) bindings
  spi: wpcm-fiu: Add direct map support
  ...
parents c5589c43 3cf241c3

Documentation/devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml

+47 −28
Original line number Diff line number Diff line
@@ -10,9 +10,6 @@ title: Amlogic Meson SPI Communication Controller 
maintainers:

  - Neil Armstrong <neil.armstrong@linaro.org>



allOf:

  - $ref: "spi-controller.yaml#"



description: |

  The Meson SPICC is a generic SPI controller for general purpose Full-Duplex

  communications with dedicated 16 words RX/TX PIO FIFOs.
@@ -43,7 +40,9 @@ properties: 
    minItems: 1

    maxItems: 2



if:

allOf:

  - $ref: "spi-controller.yaml#"

  - if:

      properties:

        compatible:

          contains:
@@ -69,6 +68,26 @@ else: 
          items:

            - const: core



  - if:

      properties:

        compatible:

          contains:

            enum:

              - amlogic,meson-gx-spicc



    then:

      properties:

        pinctrl-0: true

        pinctrl-1: true

        pinctrl-2: true



        pinctrl-names:

          minItems: 1

          items:

            - const: default

            - const: idle-high

            - const: idle-low



required:

  - compatible

  - reg

Documentation/devicetree/bindings/spi/nuvoton,npcm-fiu.txt

+1 −1
Original line number Diff line number Diff line
@@ -51,7 +51,7 @@ fiu3: spi@c00000000 { 
	clocks = <&clk NPCM7XX_CLK_AHB>;

	pinctrl-names = "default";

	pinctrl-0 = <&spi3_pins>;

	spi-nor@0 {

	flash@0 {

			...

	};

};

Documentation/devicetree/bindings/spi/nuvoton,wpcm450-fiu.yaml

0 → 100644
+66 −0
Original line number Diff line number Diff line 
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause

%YAML 1.2

---

$id: http://devicetree.org/schemas/spi/nuvoton,wpcm450-fiu.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Nuvoton WPCM450 Flash Interface Unit (FIU)



maintainers:

  - Jonathan Neuschäfer <j.neuschaefer@gmx.net>



allOf:

  - $ref: /schemas/spi/spi-controller.yaml#



properties:

  compatible:

    const: nuvoton,wpcm450-fiu



  reg:

    items:

      - description: FIU registers

      - description: Memory-mapped flash contents



  reg-names:

    items:

      - const: control

      - const: memory



  interrupts:

    maxItems: 1



  clocks:

    maxItems: 1



  nuvoton,shm:

    $ref: /schemas/types.yaml#/definitions/phandle

    description: a phandle to the SHM block (see ../arm/nuvoton,shm.yaml)



required:

  - compatible

  - reg

  - clocks



unevaluatedProperties: false



examples:

  - |

    spi@c8000000 {

      compatible = "nuvoton,wpcm450-fiu";

      reg = <0xc8000000 0x1000>, <0xc0000000 0x4000000>;

      #address-cells = <1>;

      #size-cells = <0>;

      reg-names = "control", "memory";

      clocks = <&clk 0>;

      nuvoton,shm = <&shm>;



      flash@0 {

        compatible = "jedec,spi-nor";

        reg = <0>;

      };

    };



    shm: syscon@c8001000 {

      compatible = "nuvoton,wpcm450-shm", "syscon";

      reg = <0xc8001000 0x1000>;

    };

Documentation/devicetree/bindings/spi/socionext,f-ospi.yaml

0 → 100644
+57 −0
Original line number Diff line number Diff line 
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/spi/socionext,f-ospi.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Socionext F_OSPI controller



description: |

  The Socionext F_OSPI is a controller used to interface with flash

  memories using the SPI communication interface.



maintainers:

  - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>



allOf:

  - $ref: spi-controller.yaml#



properties:

  compatible:

    const: socionext,f-ospi



  reg:

    maxItems: 1



  clocks:

    maxItems: 1



  num-cs:

    minimum: 1

    maximum: 4



required:

  - compatible

  - reg

  - clocks

  - "#address-cells"

  - "#size-cells"



unevaluatedProperties: false



examples:

  - |

    ospi0: spi@80000000 {

        compatible = "socionext,f-ospi";

        reg = <0x80000000 0x1000>;

        clocks = <&clks 0>;

        num-cs = <1>;

        #address-cells = <1>;

        #size-cells = <0>;



        flash@0 {

            compatible = "spansion,s25fl128s", "jedec,spi-nor";

            reg = <0>;

            spi-max-frequency = <50000000>;

        };

    };

Documentation/devicetree/bindings/spi/socionext,synquacer-spi.yaml

0 → 100644
+73 −0
Original line number Diff line number Diff line 
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/spi/socionext,synquacer-spi.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Socionext SynQuacer HS-SPI Controller



maintainers:

  - Masahisa Kojima <masahisa.kojima@linaro.org>

  - Jassi Brar <jaswinder.singh@linaro.org>



allOf:

  - $ref: spi-controller.yaml#



properties:

  compatible:

    const: socionext,synquacer-spi



  reg:

    maxItems: 1



  clocks:

    minItems: 1

    items:

      - description: core clock

      - description: rate clock



  clock-names:

    minItems: 1

    items:

      - const: iHCLK

      - const: iPCLK



  interrupts:

    items:

      - description: Receive Interrupt

      - description: Transmit Interrupt

      - description: Fault Interrupt



  socionext,use-rtm:

    type: boolean

    description: Enable using "retimed clock" for RX



  socionext,set-aces:

    type: boolean

    description: Enable same active clock edges field to be set



required:

  - compatible

  - reg

  - interrupts

  - clocks

  - clock-names



unevaluatedProperties: false



examples:

  - |

    #include <dt-bindings/interrupt-controller/arm-gic.h>



    spi@ff110000 {

        compatible = "socionext,synquacer-spi";

        reg = <0xff110000 0x1000>;

        interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,

               <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,

               <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;

        clocks = <&clk_hsspi>;

        clock-names = "iHCLK";

        socionext,use-rtm;

        socionext,set-aces;

    };

...