Commit d0e43912 authored by David S. Miller's avatar David S. Miller
Browse files


Tony Nguyen says:

====================
Intel Wired LAN Driver Updates 2023-03-21 (igb, igbvf, igc)

This series contains updates to igb, igbvf, and igc drivers.

Andrii changes igb driver to utilize diff_by_scaled_ppm() implementation
over an open-coded version.

Dawid adds pci_error_handlers for reset_prepare and reset_done for
igbvf.

Sasha removes unnecessary code in igc.
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents c5cf13fb 65364bbe
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+3 −8
Original line number Diff line number Diff line
@@ -67,6 +67,7 @@
#define INCVALUE_82576_MASK		GENMASK(E1000_TIMINCA_16NS_SHIFT - 1, 0)
#define INCVALUE_82576			(16u << IGB_82576_TSYNC_SHIFT)
#define IGB_NBITS_82580			40
#define IGB_82580_BASE_PERIOD		0x800000000

static void igb_ptp_tx_hwtstamp(struct igb_adapter *adapter);
static void igb_ptp_sdp_init(struct igb_adapter *adapter);
@@ -209,17 +210,11 @@ static int igb_ptp_adjfine_82580(struct ptp_clock_info *ptp, long scaled_ppm)
	struct igb_adapter *igb = container_of(ptp, struct igb_adapter,
					       ptp_caps);
	struct e1000_hw *hw = &igb->hw;
	int neg_adj = 0;
	bool neg_adj;
	u64 rate;
	u32 inca;

	if (scaled_ppm < 0) {
		neg_adj = 1;
		scaled_ppm = -scaled_ppm;
	}
	rate = scaled_ppm;
	rate <<= 13;
	rate = div_u64(rate, 15625);
	neg_adj = diff_by_scaled_ppm(IGB_82580_BASE_PERIOD, scaled_ppm, &rate);

	inca = rate & INCVALUE_MASK;
	if (neg_adj)
+29 −0
Original line number Diff line number Diff line
@@ -2589,6 +2589,33 @@ static void igbvf_io_resume(struct pci_dev *pdev)
	netif_device_attach(netdev);
}

/**
 * igbvf_io_prepare - prepare device driver for PCI reset
 * @pdev: PCI device information struct
 */
static void igbvf_io_prepare(struct pci_dev *pdev)
{
	struct net_device *netdev = pci_get_drvdata(pdev);
	struct igbvf_adapter *adapter = netdev_priv(netdev);

	while (test_and_set_bit(__IGBVF_RESETTING, &adapter->state))
		usleep_range(1000, 2000);
	igbvf_down(adapter);
}

/**
 * igbvf_io_reset_done - PCI reset done, device driver reset can begin
 * @pdev: PCI device information struct
 */
static void igbvf_io_reset_done(struct pci_dev *pdev)
{
	struct net_device *netdev = pci_get_drvdata(pdev);
	struct igbvf_adapter *adapter = netdev_priv(netdev);

	igbvf_up(adapter);
	clear_bit(__IGBVF_RESETTING, &adapter->state);
}

static void igbvf_print_device_info(struct igbvf_adapter *adapter)
{
	struct e1000_hw *hw = &adapter->hw;
@@ -2916,6 +2943,8 @@ static const struct pci_error_handlers igbvf_err_handler = {
	.error_detected = igbvf_io_error_detected,
	.slot_reset = igbvf_io_slot_reset,
	.resume = igbvf_io_resume,
	.reset_prepare = igbvf_io_prepare,
	.reset_done = igbvf_io_reset_done,
};

static const struct pci_device_id igbvf_pci_tbl[] = {
+0 −3
Original line number Diff line number Diff line
@@ -662,9 +662,6 @@
 */
#define IGC_TW_SYSTEM_100_MASK		0x0000FF00
#define IGC_TW_SYSTEM_100_SHIFT		8
#define IGC_DMACR_DMAC_EN		0x80000000 /* Enable DMA Coalescing */
#define IGC_DMACR_DMACTHR_MASK		0x00FF0000
#define IGC_DMACR_DMACTHR_SHIFT		16
/* Reg val to set scale to 1024 nsec */
#define IGC_LTRMINV_SCALE_1024		2
/* Reg val to set scale to 32768 nsec */
+5 −14
Original line number Diff line number Diff line
@@ -593,20 +593,11 @@ s32 igc_set_ltr_i225(struct igc_hw *hw, bool link)
		size = rd32(IGC_RXPBS) &
		       IGC_RXPBS_SIZE_I225_MASK;

		/* Calculations vary based on DMAC settings. */
		if (rd32(IGC_DMACR) & IGC_DMACR_DMAC_EN) {
			size -= (rd32(IGC_DMACR) &
				 IGC_DMACR_DMACTHR_MASK) >>
				 IGC_DMACR_DMACTHR_SHIFT;
			/* Convert size to bits. */
			size *= 1024 * 8;
		} else {
		/* Convert size to bytes, subtract the MTU, and then
		 * convert the size to bits.
		 */
		size *= 1024;
		size *= 8;
		}

		if (size < 0) {
			hw_dbg("Invalid effective Rx buffer size %d\n",
+0 −1
Original line number Diff line number Diff line
@@ -292,7 +292,6 @@

/* LTR registers */
#define IGC_LTRC	0x01A0 /* Latency Tolerance Reporting Control */
#define IGC_DMACR	0x02508 /* DMA Coalescing Control Register */
#define IGC_LTRMINV	0x5BB0 /* LTR Minimum Value */
#define IGC_LTRMAXV	0x5BB4 /* LTR Maximum Value */