Commit d00c50b3 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'spi-fix-v5.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi 

Pull spi fixes from Mark Brown:
 "A small collection of fixes that have arrived since the merge window,
  the most noticable one is a fix for unmapping messages when the
  mapping was done with the struct device supplied to do the mapping
  overridden"

* tag 'spi-fix-v5.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi:
  spi: bcm-qspi: fix MSPI only access with bcm_qspi_exec_mem_op()
  spi: cadence-quadspi: fix protocol setup for non-1-1-X operations
  spi: core: add dma_map_dev for __spi_unmap_msg()
  spi: mxic: Fix an error handling path in mxic_spi_probe()
  spi: rpc-if: Fix RPM imbalance in probe error path
parents 98849765 2c7d1b28

drivers/spi/spi-bcm-qspi.c

+2 −2
Original line number Diff line number Diff line
@@ -1205,7 +1205,7 @@ static int bcm_qspi_exec_mem_op(struct spi_mem *mem, 
	addr = op->addr.val;

	len = op->data.nbytes;



	if (bcm_qspi_bspi_ver_three(qspi) == true) {

	if (has_bspi(qspi) && bcm_qspi_bspi_ver_three(qspi) == true) {

		/*

		 * The address coming into this function is a raw flash offset.

		 * But for BSPI <= V3, we need to convert it to a remapped BSPI
@@ -1224,7 +1224,7 @@ static int bcm_qspi_exec_mem_op(struct spi_mem *mem, 
	    len < 4)

		mspi_read = true;



	if (mspi_read)

	if (!has_bspi(qspi) || mspi_read)

		return bcm_qspi_mspi_exec_mem_op(spi, op);



	ret = bcm_qspi_bspi_set_mode(qspi, op, 0);

drivers/spi/spi-cadence-quadspi.c

+12 −34
Original line number Diff line number Diff line
@@ -19,6 +19,7 @@ 
#include <linux/iopoll.h>

#include <linux/jiffies.h>

#include <linux/kernel.h>

#include <linux/log2.h>

#include <linux/module.h>

#include <linux/of_device.h>

#include <linux/of.h>
@@ -102,12 +103,6 @@ struct cqspi_driver_platdata { 
#define CQSPI_TIMEOUT_MS			500

#define CQSPI_READ_TIMEOUT_MS			10



/* Instruction type */

#define CQSPI_INST_TYPE_SINGLE			0

#define CQSPI_INST_TYPE_DUAL			1

#define CQSPI_INST_TYPE_QUAD			2

#define CQSPI_INST_TYPE_OCTAL			3



#define CQSPI_DUMMY_CLKS_PER_BYTE		8

#define CQSPI_DUMMY_BYTES_MAX			4

#define CQSPI_DUMMY_CLKS_MAX			31
@@ -376,10 +371,6 @@ static unsigned int cqspi_calc_dummy(const struct spi_mem_op *op, bool dtr) 
static int cqspi_set_protocol(struct cqspi_flash_pdata *f_pdata,

			      const struct spi_mem_op *op)

{

	f_pdata->inst_width = CQSPI_INST_TYPE_SINGLE;

	f_pdata->addr_width = CQSPI_INST_TYPE_SINGLE;

	f_pdata->data_width = CQSPI_INST_TYPE_SINGLE;



	/*

	 * For an op to be DTR, cmd phase along with every other non-empty

	 * phase should have dtr field set to 1. If an op phase has zero
@@ -389,32 +380,23 @@ static int cqspi_set_protocol(struct cqspi_flash_pdata *f_pdata, 
		       (!op->addr.nbytes || op->addr.dtr) &&

		       (!op->data.nbytes || op->data.dtr);



	switch (op->data.buswidth) {

	case 0:

		break;

	case 1:

		f_pdata->data_width = CQSPI_INST_TYPE_SINGLE;

		break;

	case 2:

		f_pdata->data_width = CQSPI_INST_TYPE_DUAL;

		break;

	case 4:

		f_pdata->data_width = CQSPI_INST_TYPE_QUAD;

		break;

	case 8:

		f_pdata->data_width = CQSPI_INST_TYPE_OCTAL;

		break;

	default:

		return -EINVAL;

	}

	f_pdata->inst_width = 0;

	if (op->cmd.buswidth)

		f_pdata->inst_width = ilog2(op->cmd.buswidth);



	f_pdata->addr_width = 0;

	if (op->addr.buswidth)

		f_pdata->addr_width = ilog2(op->addr.buswidth);



	f_pdata->data_width = 0;

	if (op->data.buswidth)

		f_pdata->data_width = ilog2(op->data.buswidth);



	/* Right now we only support 8-8-8 DTR mode. */

	if (f_pdata->dtr) {

		switch (op->cmd.buswidth) {

		case 0:

			break;

		case 8:

			f_pdata->inst_width = CQSPI_INST_TYPE_OCTAL;

			break;

		default:

			return -EINVAL;
@@ -422,9 +404,7 @@ static int cqspi_set_protocol(struct cqspi_flash_pdata *f_pdata, 


		switch (op->addr.buswidth) {

		case 0:

			break;

		case 8:

			f_pdata->addr_width = CQSPI_INST_TYPE_OCTAL;

			break;

		default:

			return -EINVAL;
@@ -432,9 +412,7 @@ static int cqspi_set_protocol(struct cqspi_flash_pdata *f_pdata, 


		switch (op->data.buswidth) {

		case 0:

			break;

		case 8:

			f_pdata->data_width = CQSPI_INST_TYPE_OCTAL;

			break;

		default:

			return -EINVAL;

drivers/spi/spi-mxic.c

+1 −0
Original line number Diff line number Diff line
@@ -813,6 +813,7 @@ static int mxic_spi_probe(struct platform_device *pdev) 
	if (ret) {

		dev_err(&pdev->dev, "spi_register_master failed\n");

		pm_runtime_disable(&pdev->dev);

		mxic_spi_mem_ecc_remove(mxic);

	}



	return ret;

drivers/spi/spi-rpc-if.c

+6 −2
Original line number Diff line number Diff line
@@ -158,14 +158,18 @@ static int rpcif_spi_probe(struct platform_device *pdev) 


	error = rpcif_hw_init(rpc, false);

	if (error)

		return error;

		goto out_disable_rpm;



	error = spi_register_controller(ctlr);

	if (error) {

		dev_err(&pdev->dev, "spi_register_controller failed\n");

		rpcif_disable_rpm(rpc);

		goto out_disable_rpm;

	}



	return 0;



out_disable_rpm:

	rpcif_disable_rpm(rpc);

	return error;

}

drivers/spi/spi.c

+4 −0
Original line number Diff line number Diff line
@@ -1130,11 +1130,15 @@ static int __spi_unmap_msg(struct spi_controller *ctlr, struct spi_message *msg) 


	if (ctlr->dma_tx)

		tx_dev = ctlr->dma_tx->device->dev;

	else if (ctlr->dma_map_dev)

		tx_dev = ctlr->dma_map_dev;

	else

		tx_dev = ctlr->dev.parent;



	if (ctlr->dma_rx)

		rx_dev = ctlr->dma_rx->device->dev;

	else if (ctlr->dma_map_dev)

		rx_dev = ctlr->dma_map_dev;

	else

		rx_dev = ctlr->dev.parent;