Commit d00a50cf authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'atlantic-fixes' 



Sudarsana Reddy Kalluru says:

====================
net: atlantic: 11-2021 fixes

The patch series contains fixes for atlantic driver to improve support
of latest AQC113 chipset.

Please consider applying it to 'net' tree.
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 2191b1df 060a0fb7

drivers/net/ethernet/aquantia/atlantic/aq_common.h

+14 −13
Original line number Diff line number Diff line
@@ -40,10 +40,12 @@ 


#define AQ_DEVICE_ID_AQC113DEV	0x00C0

#define AQ_DEVICE_ID_AQC113CS	0x94C0

#define AQ_DEVICE_ID_AQC113CA	0x34C0

#define AQ_DEVICE_ID_AQC114CS	0x93C0

#define AQ_DEVICE_ID_AQC113	0x04C0

#define AQ_DEVICE_ID_AQC113C	0x14C0

#define AQ_DEVICE_ID_AQC115C	0x12C0

#define AQ_DEVICE_ID_AQC116C	0x11C0



#define HW_ATL_NIC_NAME "Marvell (aQuantia) AQtion 10Gbit Network Adapter"
@@ -53,20 +55,19 @@ 


#define AQ_NIC_RATE_10G		BIT(0)

#define AQ_NIC_RATE_5G		BIT(1)

#define AQ_NIC_RATE_5GSR	BIT(2)

#define AQ_NIC_RATE_2G5		BIT(3)

#define AQ_NIC_RATE_1G		BIT(4)

#define AQ_NIC_RATE_100M	BIT(5)

#define AQ_NIC_RATE_10M		BIT(6)

#define AQ_NIC_RATE_1G_HALF	BIT(7)

#define AQ_NIC_RATE_100M_HALF	BIT(8)

#define AQ_NIC_RATE_10M_HALF	BIT(9)

#define AQ_NIC_RATE_2G5		BIT(2)

#define AQ_NIC_RATE_1G		BIT(3)

#define AQ_NIC_RATE_100M	BIT(4)

#define AQ_NIC_RATE_10M		BIT(5)

#define AQ_NIC_RATE_1G_HALF	BIT(6)

#define AQ_NIC_RATE_100M_HALF	BIT(7)

#define AQ_NIC_RATE_10M_HALF	BIT(8)



#define AQ_NIC_RATE_EEE_10G	BIT(10)

#define AQ_NIC_RATE_EEE_5G	BIT(11)

#define AQ_NIC_RATE_EEE_2G5	BIT(12)

#define AQ_NIC_RATE_EEE_1G	BIT(13)

#define AQ_NIC_RATE_EEE_100M	BIT(14)

#define AQ_NIC_RATE_EEE_10G	BIT(9)

#define AQ_NIC_RATE_EEE_5G	BIT(10)

#define AQ_NIC_RATE_EEE_2G5	BIT(11)

#define AQ_NIC_RATE_EEE_1G	BIT(12)

#define AQ_NIC_RATE_EEE_100M	BIT(13)

#define AQ_NIC_RATE_EEE_MSK     (AQ_NIC_RATE_EEE_10G |\

				 AQ_NIC_RATE_EEE_5G |\

				 AQ_NIC_RATE_EEE_2G5 |\

drivers/net/ethernet/aquantia/atlantic/aq_hw.h

+2 −0
Original line number Diff line number Diff line
@@ -80,6 +80,8 @@ struct aq_hw_link_status_s { 
};



struct aq_stats_s {

	u64 brc;

	u64 btc;

	u64 uprc;

	u64 mprc;

	u64 bprc;

drivers/net/ethernet/aquantia/atlantic/aq_nic.c

+8 −2
Original line number Diff line number Diff line
@@ -905,7 +905,13 @@ u64 *aq_nic_get_stats(struct aq_nic_s *self, u64 *data) 
	data[++i] = stats->mbtc;

	data[++i] = stats->bbrc;

	data[++i] = stats->bbtc;

	if (stats->brc)

		data[++i] = stats->brc;

	else

		data[++i] = stats->ubrc + stats->mbrc + stats->bbrc;

	if (stats->btc)

		data[++i] = stats->btc;

	else

		data[++i] = stats->ubtc + stats->mbtc + stats->bbtc;

	data[++i] = stats->dma_pkt_rc;

	data[++i] = stats->dma_pkt_tc;

drivers/net/ethernet/aquantia/atlantic/aq_pci_func.c

+6 −1
Original line number Diff line number Diff line
@@ -49,6 +49,8 @@ static const struct pci_device_id aq_pci_tbl[] = { 
	{ PCI_VDEVICE(AQUANTIA, AQ_DEVICE_ID_AQC113), },

	{ PCI_VDEVICE(AQUANTIA, AQ_DEVICE_ID_AQC113C), },

	{ PCI_VDEVICE(AQUANTIA, AQ_DEVICE_ID_AQC115C), },

	{ PCI_VDEVICE(AQUANTIA, AQ_DEVICE_ID_AQC113CA), },

	{ PCI_VDEVICE(AQUANTIA, AQ_DEVICE_ID_AQC116C), },



	{}

};
@@ -85,7 +87,10 @@ static const struct aq_board_revision_s hw_atl_boards[] = { 
	{ AQ_DEVICE_ID_AQC113CS,	AQ_HWREV_ANY,	&hw_atl2_ops, &hw_atl2_caps_aqc113, },

	{ AQ_DEVICE_ID_AQC114CS,	AQ_HWREV_ANY,	&hw_atl2_ops, &hw_atl2_caps_aqc113, },

	{ AQ_DEVICE_ID_AQC113C,		AQ_HWREV_ANY,	&hw_atl2_ops, &hw_atl2_caps_aqc113, },

	{ AQ_DEVICE_ID_AQC115C,		AQ_HWREV_ANY,	&hw_atl2_ops, &hw_atl2_caps_aqc113, },

	{ AQ_DEVICE_ID_AQC115C,		AQ_HWREV_ANY,	&hw_atl2_ops, &hw_atl2_caps_aqc115c, },

	{ AQ_DEVICE_ID_AQC113CA,	AQ_HWREV_ANY,	&hw_atl2_ops, &hw_atl2_caps_aqc113, },

	{ AQ_DEVICE_ID_AQC116C,		AQ_HWREV_ANY,	&hw_atl2_ops, &hw_atl2_caps_aqc116c, },



};



MODULE_DEVICE_TABLE(pci, aq_pci_tbl);

drivers/net/ethernet/aquantia/atlantic/aq_vec.c

+0 −3
Original line number Diff line number Diff line
@@ -362,9 +362,6 @@ unsigned int aq_vec_get_sw_stats(struct aq_vec_s *self, const unsigned int tc, u 
{

	unsigned int count;



	WARN_ONCE(!aq_vec_is_valid_tc(self, tc),

		  "Invalid tc %u (#rx=%u, #tx=%u)\n",

		  tc, self->rx_rings, self->tx_rings);

	if (!aq_vec_is_valid_tc(self, tc))

		return 0;