Unverified Commit cfc2928c authored by Amit Kumar Mahapatra's avatar Amit Kumar Mahapatra Committed by Tudor Ambarus
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dt-bindings: mtd: jedec, spi-nor: Add DT property to avoid setting SRWD bit in status register 



If the WP# signal of the flash device is either not connected or is wrongly
tied to GND (that includes internal pull-downs), and the software sets the
status register write disable (SRWD) bit in the status register then the
status register permanently becomes read-only. To avoid this added a new
boolean DT property "no-wp". If this property is set in the DT then the
software avoids setting the SRWD during status register write operation.

Signed-off-by: default avatarAmit Kumar Mahapatra <amit.kumar-mahapatra@amd.com>
Reviewed-by: default avatarConor Dooley <conor.dooley@microchip.com>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Reviewed-by: default avatarMichael Walle <michael@walle.cc>
Link: https://lore.kernel.org/r/20230630142233.63585-2-amit.kumar-mahapatra@amd.com


Signed-off-by: default avatarTudor Ambarus <tudor.ambarus@linaro.org>
parent 06c2afb8

Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml

+15 −0
Original line number Diff line number Diff line
@@ -70,6 +70,21 @@ properties: 
      be used on such systems, to denote the absence of a reliable reset

      mechanism.



  no-wp:

    type: boolean

    description:

      The status register write disable (SRWD) bit in status register, combined

      with the WP# signal, provides hardware data protection for the device. When

      the SRWD bit is set to 1, and the WP# signal is either driven LOW or hard

      strapped to LOW, the status register nonvolatile bits become read-only and

      the WRITE STATUS REGISTER operation will not execute. The only way to exit

      this hardware-protected mode is to drive WP# HIGH. If the WP# signal of the

      flash device is not connected or is wrongly tied to GND (that includes internal

      pull-downs) then status register permanently becomes read-only as the SRWD bit

      cannot be reset. This boolean flag can be used on such systems to avoid setting

      the SRWD bit while writing the status register. WP# signal hard strapped to GND

      can be a valid use case.



  reset-gpios:

    description:

      A GPIO line connected to the RESET (active low) signal of the device.