Commit cfb5677d authored by Daniel Golle's avatar Daniel Golle Committed by Jakub Kicinski
Browse files

net: ethernet: mtk_eth_soc: fix register definitions for MT7988 



More register macros need to be adjusted for the 3rd GMAC on MT7988.
Account for added bit in SYSCFG0_SGMII_MASK.

Fixes: 445eb644 ("net: ethernet: mtk_eth_soc: add basic support for MT7988 SoC")
Signed-off-by: default avatarDaniel Golle <daniel@makrotopia.org>
Reviewed-by: default avatarSimon Horman <horms@kernel.org>
Link: https://lore.kernel.org/r/1c8da012e2ca80939906d85f314138c552139f0f.1692721443.git.daniel@makrotopia.org


Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent e83fabb7

drivers/net/ethernet/mediatek/mtk_eth_soc.h

+5 −3
Original line number Diff line number Diff line
@@ -133,10 +133,12 @@ 
#define MTK_GDMA_XGDM_SEL	BIT(31)



/* Unicast Filter MAC Address Register - Low */

#define MTK_GDMA_MAC_ADRL(x)	(0x508 + (x * 0x1000))

#define MTK_GDMA_MAC_ADRL(x)	({ typeof(x) _x = (x); (_x == MTK_GMAC3_ID) ?	\

				   0x548 : 0x508 + (_x * 0x1000); })



/* Unicast Filter MAC Address Register - High */

#define MTK_GDMA_MAC_ADRH(x)	(0x50C + (x * 0x1000))

#define MTK_GDMA_MAC_ADRH(x)	({ typeof(x) _x = (x); (_x == MTK_GMAC3_ID) ?	\

				   0x54C : 0x50C + (_x * 0x1000); })



/* FE global misc reg*/

#define MTK_FE_GLO_MISC         0x124
@@ -503,7 +505,7 @@ 
#define ETHSYS_SYSCFG0		0x14

#define SYSCFG0_GE_MASK		0x3

#define SYSCFG0_GE_MODE(x, y)	(x << (12 + (y * 2)))

#define SYSCFG0_SGMII_MASK     GENMASK(9, 8)

#define SYSCFG0_SGMII_MASK     GENMASK(9, 7)

#define SYSCFG0_SGMII_GMAC1    ((2 << 8) & SYSCFG0_SGMII_MASK)

#define SYSCFG0_SGMII_GMAC2    ((3 << 8) & SYSCFG0_SGMII_MASK)

#define SYSCFG0_SGMII_GMAC1_V2 BIT(9)