Commit cfb2cffa authored by Jakub Kicinski's avatar Jakub Kicinski
Browse files

Merge branch 'support-for-octeontx2-98xx-silcion' 

Subbaraya Sundeep says:

====================
Support for OcteonTx2 98xx silicon

OcteonTx2 series of silicons have multiple variants, the
98xx variant has two network interface controllers (NIX blocks)
each of which supports upto 100Gbps. Similarly 98xx supports
two crypto blocks (CPT) to double the crypto performance.
The current RVU drivers support a single NIX and
CPT blocks, this patchset adds support for multiple
blocks of same type to be active at the same time.

Also the number of serdes controllers (CGX) have increased
from three to five on 98xx. Each of the CGX block supports
upto 4 physical interfaces depending on the serdes mode ie
upto 20 physical interfaces. At a time each CGX block can
be mapped to a single NIX. The HW configuration to map CGX
and NIX blocks is done by firmware.

NPC has two new interfaces added NIX1_RX and NIX1_TX
similar to NIX0 interfaces. Also MCAM entries is increased
from 4k to 16k. To support the 16k entries extended set
is added in hardware which are at completely different
register offsets. Fortunately new constant registers
can be read to figure out the extended set is present
or not.

This patch set modifies existing AF and PF drivers
in below order to support 98xx:
- Prepare for supporting multiple blocks of same type.
  Functions which operate with block type to get or set
  resources count are modified to operate with block address
- Manage allocating and freeing LFs from new NIX1 and CPT1 RVU blocks.
- NIX block specific initialization and teardown for NIX1
- Based on the mapping set by Firmware, assign the NIX block
  LFs to a PF/VF.
- Multicast entries context is setup for NIX1 along with NIX0
- NPC changes to support extended set of MCAM entries, counters
  and NIX1 interfaces to NPC.
- All the mailbox changes required for the new blocks in 98xx.
- Since there are more CGX links in 98xx the hardcoded LBK
  link value needed by netdev drivers is not sufficient any
  more. Hence AF consumers need to get the number of all links
  and calculate the LBK link.
- Debugfs changes to display NIX1 contexts similar to NIX0
- Debugfs change to display mapping between CGX, NIX and PF.
====================

Link: https://lore.kernel.org/r/1603948549-781-1-git-send-email-sundeep.lkml@gmail.com


Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parents 1a025560 e2fb3730

drivers/net/ethernet/marvell/octeontx2/af/cgx.c

+11 −2
Original line number Diff line number Diff line
@@ -145,6 +145,16 @@ int cgx_get_cgxid(void *cgxd) 
	return cgx->cgx_id;

}



u8 cgx_lmac_get_p2x(int cgx_id, int lmac_id)

{

	struct cgx *cgx_dev = cgx_get_pdata(cgx_id);

	u64 cfg;



	cfg = cgx_read(cgx_dev, lmac_id, CGXX_CMRX_CFG);



	return (cfg & CMR_P2X_SEL_MASK) >> CMR_P2X_SEL_SHIFT;

}



/* Ensure the required lock for event queue(where asynchronous events are

 * posted) is acquired before calling this API. Else an asynchronous event(with

 * latest link status) can reach the destination before this function returns
@@ -814,8 +824,7 @@ static int cgx_lmac_verify_fwi_version(struct cgx *cgx) 
	minor_ver = FIELD_GET(RESP_MINOR_VER, resp);

	dev_dbg(dev, "Firmware command interface version = %d.%d\n",

		major_ver, minor_ver);

	if (major_ver != CGX_FIRMWARE_MAJOR_VER ||

	    minor_ver != CGX_FIRMWARE_MINOR_VER)

	if (major_ver != CGX_FIRMWARE_MAJOR_VER)

		return -EIO;

	else

		return 0;

drivers/net/ethernet/marvell/octeontx2/af/cgx.h

+5 −0
Original line number Diff line number Diff line
@@ -27,6 +27,10 @@ 


/* Registers */

#define CGXX_CMRX_CFG			0x00

#define CMR_P2X_SEL_MASK		GENMASK_ULL(61, 59)

#define CMR_P2X_SEL_SHIFT		59ULL

#define CMR_P2X_SEL_NIX0		1ULL

#define CMR_P2X_SEL_NIX1		2ULL

#define CMR_EN				BIT_ULL(55)

#define DATA_PKT_TX_EN			BIT_ULL(53)

#define DATA_PKT_RX_EN			BIT_ULL(54)
@@ -142,5 +146,6 @@ int cgx_lmac_get_pause_frm(void *cgxd, int lmac_id, 
int cgx_lmac_set_pause_frm(void *cgxd, int lmac_id,

			   u8 tx_pause, u8 rx_pause);

void cgx_lmac_ptp_config(void *cgxd, int lmac_id, bool enable);

u8 cgx_lmac_get_p2x(int cgx_id, int lmac_id);



#endif /* CGX_H */

drivers/net/ethernet/marvell/octeontx2/af/common.h

+8 −2
Original line number Diff line number Diff line
@@ -174,8 +174,12 @@ enum nix_scheduler { 
#define NPC_MCAM_KEY_X2			1

#define NPC_MCAM_KEY_X4			2



#define NIX_INTF_RX			0

#define NIX_INTF_TX			1

#define NIX_INTFX_RX(a)			(0x0ull | (a) << 1)

#define NIX_INTFX_TX(a)			(0x1ull | (a) << 1)



/* Default interfaces are NIX0_RX and NIX0_TX */

#define NIX_INTF_RX			NIX_INTFX_RX(0)

#define NIX_INTF_TX			NIX_INTFX_TX(0)



#define NIX_INTF_TYPE_CGX		0

#define NIX_INTF_TYPE_LBK		1
@@ -206,6 +210,8 @@ enum ndc_idx_e { 
	NIX0_RX = 0x0,

	NIX0_TX = 0x1,

	NPA0_U  = 0x2,

	NIX1_RX = 0x4,

	NIX1_TX = 0x5,

};



enum ndc_ctype_e {

drivers/net/ethernet/marvell/octeontx2/af/mbox.h

+18 −1
Original line number Diff line number Diff line
@@ -86,7 +86,7 @@ struct mbox_msghdr { 
#define OTX2_MBOX_REQ_SIG (0xdead)

#define OTX2_MBOX_RSP_SIG (0xbeef)

	u16 sig;         /* Signature, for validating corrupted msgs */

#define OTX2_MBOX_VERSION (0x0001)

#define OTX2_MBOX_VERSION (0x0007)

	u16 ver;         /* Version of msg's structure for this ID */

	u16 next_msgoff; /* Offset of next msg within mailbox region */

	int rc;          /* Msg process'ed response code */
@@ -271,6 +271,17 @@ struct ready_msg_rsp { 
 * or to detach partial of a cetain resource type.

 * Rest of the fields specify how many of what type to

 * be attached.

 * To request LFs from two blocks of same type this mailbox

 * can be sent twice as below:

 *      struct rsrc_attach *attach;

 *       .. Allocate memory for message ..

 *       attach->cptlfs = 3; <3 LFs from CPT0>

 *       .. Send message ..

 *       .. Allocate memory for message ..

 *       attach->modify = 1;

 *       attach->cpt_blkaddr = BLKADDR_CPT1;

 *       attach->cptlfs = 2; <2 LFs from CPT1>

 *       .. Send message ..

 */

struct rsrc_attach {

	struct mbox_msghdr hdr;
@@ -281,6 +292,7 @@ struct rsrc_attach { 
	u16  ssow;

	u16  timlfs;

	u16  cptlfs;

	int  cpt_blkaddr; /* BLKADDR_CPT0/BLKADDR_CPT1 or 0 for BLKADDR_CPT0 */

};



/* Structure for relinquishing resources.
@@ -314,6 +326,8 @@ struct msix_offset_rsp { 
	u16  ssow_msixoff[MAX_RVU_BLKLF_CNT];

	u16  timlf_msixoff[MAX_RVU_BLKLF_CNT];

	u16  cptlf_msixoff[MAX_RVU_BLKLF_CNT];

	u8   cpt1_lfs;

	u16  cpt1_lf_msixoff[MAX_RVU_BLKLF_CNT];

};



struct get_hw_cap_rsp {
@@ -491,6 +505,9 @@ struct nix_lf_alloc_rsp { 
	u8	lf_tx_stats; /* NIX_AF_CONST1::LF_TX_STATS */

	u16	cints; /* NIX_AF_CONST2::CINTS */

	u16	qints; /* NIX_AF_CONST2::QINTS */

	u8	cgx_links;  /* No. of CGX links present in HW */

	u8	lbk_links;  /* No. of LBK links present in HW */

	u8	sdp_links;  /* No. of SDP links present in HW */

};



/* NIX AQ enqueue msg */

drivers/net/ethernet/marvell/octeontx2/af/npc_profile.h

+1 −1
Original line number Diff line number Diff line
@@ -13380,7 +13380,7 @@ static const struct npc_lt_def_cfg npc_lt_defaults = { 
	},

};



static const struct npc_mcam_kex npc_mkex_default = {

static struct npc_mcam_kex npc_mkex_default = {

	.mkex_sign = MKEX_SIGN,

	.name = "default",

	.kpu_version = NPC_KPU_PROFILE_VER,