Commit cf867d6a authored by Radhakrishna Sripada's avatar Radhakrishna Sripada
Browse files

drm/i915/mtl: Add MTP ddc pin configuration 



Meteorlake PCH reuses Alderlake vbt, DE pin mapping. Extend
ADL-P pin mapping for Meteorlake.

Bspec: 20124 does not have the mapping for MTP. Based on Bspec:49306, 64051,
it is concluded that MTP and ADL-P PCH have the same vbt -> DE pin pair mapping.

Reviewed-by: default avatarLucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: default avatarRadhakrishna Sripada <radhakrishna.sripada@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20221005002534.2966978-1-radhakrishna.sripada@intel.com
parent 47d4ae21

drivers/gpu/drm/i915/display/intel_bios.c

+1 −1
Original line number Diff line number Diff line
@@ -2188,7 +2188,7 @@ static u8 map_ddc_pin(struct drm_i915_private *i915, u8 vbt_pin) 
	const u8 *ddc_pin_map;

	int n_entries;



	if (IS_ALDERLAKE_P(i915)) {

	if (HAS_PCH_MTP(i915) || IS_ALDERLAKE_P(i915)) {

		ddc_pin_map = adlp_ddc_pin_map;

		n_entries = ARRAY_SIZE(adlp_ddc_pin_map);

	} else if (IS_ALDERLAKE_S(i915)) {