Commit cf67edce authored by Miquel Raynal's avatar Miquel Raynal
Browse files

mtd: rawnand: arasan: Use the right DMA mask 



Xilinx ZynqMP SoC and the Arasan controller support 64-bit DMA
addressing. Define the right mask otherwise the default is 32
and some accesses may overflow the default mask.

Reported-by: default avatarJorge Courett <jorge.courett@gmail.com>
Signed-off-by: default avatarMiquel Raynal <miquel.raynal@bootlin.com>
Tested-by: default avatarJorge Courett <jorge.courett@gmail.com>
Link: https://lore.kernel.org/linux-mtd/20210527084548.208429-1-miquel.raynal@bootlin.com
parent c93081b2

drivers/mtd/nand/raw/arasan-nand-controller.c

+4 −0
Original line number Diff line number Diff line
@@ -1398,6 +1398,10 @@ static int anfc_probe(struct platform_device *pdev) 
	if (ret)

		goto disable_controller_clk;



	ret = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64));

	if (ret)

		goto disable_bus_clk;



	ret = anfc_parse_cs(nfc);

	if (ret)

		goto disable_bus_clk;