Commit cf52de61 authored Aug 31, 2022 by Like Xu Committed by Sean Christopherson Sep 28, 2022

KVM: x86/pmu: Avoid using PEBS perf_events for normal counters



The check logic in the pmc_resume_counter() to determine whether
a perf_event is reusable is partial and flawed, especially when it
comes to a pseudocode sequence (contrived, but valid) like:

  - enabling a counter and its PEBS bit
  - enable global_ctrl
  - run workload
  - disable only the PEBS bit, leaving the global_ctrl bit enabled

In this corner case, a perf_event created for PEBS can be reused by
a normal counter before it has been released and recreated, and when this
normal counter overflows, it triggers a PEBS interrupt (precise_ip != 0).

To address this issue, reprogram all affected counters when PEBS_ENABLE
change and reuse a counter if and only if PEBS exactly matches precise.

Fixes: 79f3e3b5 ("KVM: x86/pmu: Reprogram PEBS event to emulate guest PEBS counter")
Signed-off-by: Like Xu <likexu@tencent.com>
Link: https://lore.kernel.org/r/20220831085328.45489-4-likexu@tencent.com


Signed-off-by: Sean Christopherson <seanjc@google.com>

parent c0245b77

arch/x86/kvm/pmu.c

+2 −2

Original line number	Diff line number	Diff line
		@@ -237,8 +237,8 @@ static bool pmc_resume_counter(struct kvm_pmc *pmc)
		get_sample_period(pmc, pmc->counter)))
		return false;

		if (!test_bit(pmc->idx, (unsigned long *)&pmc_to_pmu(pmc)->pebs_enable) &&
		pmc->perf_event->attr.precise_ip)
		if (test_bit(pmc->idx, (unsigned long *)&pmc_to_pmu(pmc)->pebs_enable) !=
		(!!pmc->perf_event->attr.precise_ip))
		return false;

		/* reuse perf_event to serve as pmc_reprogram_counter() does*/

arch/x86/kvm/vmx/pmu_intel.c

+2 −0

Original line number	Diff line number	Diff line
		@@ -431,7 +431,9 @@ static int intel_pmu_set_msr(struct kvm_vcpu vcpu, struct msr_data msr_info)
		if (pmu->pebs_enable == data)
		return 0;
		if (!(data & pmu->pebs_enable_mask)) {
		diff = pmu->pebs_enable ^ data;
		pmu->pebs_enable = data;
		reprogram_counters(pmu, diff);
		return 0;
		}
		break;