Commit cee0af5e authored by Breno Leitao's avatar Breno Leitao Committed by Luo Gengkun
Browse files

perf/x86/amd/core: Always clear status for idx 

mainline inclusion
from mainline-v6.3-rc4
commit 263f5eca
category: bugfix
bugzilla: https://gitee.com/openeuler/kernel/issues/IAMTVA
Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=263f5ecaf7080513efc248ec739b6d9e00f4129f



--------------------------------

The variable 'status' (which contains the unhandled overflow bits) is
not being properly masked in some cases, displaying the following
warning:

  WARNING: CPU: 156 PID: 475601 at arch/x86/events/amd/core.c:972 amd_pmu_v2_handle_irq+0x216/0x270

This seems to be happening because the loop is being continued before
the status bit being unset, in case x86_perf_event_set_period()
returns 0. This is also causing an inconsistency because the "handled"
counter is incremented, but the status bit is not cleaned.

Move the bit cleaning together above, together when the "handled"
counter is incremented.

Fixes: 7685665c ("perf/x86/amd/core: Add PerfMonV2 overflow handling")
Signed-off-by: default avatarBreno Leitao <leitao@debian.org>
Signed-off-by: default avatarPeter Zijlstra (Intel) <peterz@infradead.org>
Reviewed-by: default avatarSandipan Das <sandipan.das@amd.com>
Link: https://lore.kernel.org/r/20230321113338.1669660-1-leitao@debian.org


Signed-off-by: default avatarLuo Gengkun <luogengkun2@huawei.com>
parent b32a887d

arch/x86/events/amd/core.c

+1 −2
Original line number Diff line number Diff line
@@ -956,6 +956,7 @@ static int amd_pmu_v2_handle_irq(struct pt_regs *regs) 


		/* Event overflow */

		handled++;

		status &= ~mask;

		perf_sample_data_init(&data, 0, hwc->last_period);



		if (!x86_perf_event_set_period(event))
@@ -963,8 +964,6 @@ static int amd_pmu_v2_handle_irq(struct pt_regs *regs) 


		if (perf_event_overflow(event, &data, regs))

			x86_pmu_stop(event, 0);



		status &= ~mask;

	}



	/*