Commit ced41bb1 authored by Chuanhua Han's avatar Chuanhua Han Committed by Shawn Guo
Browse files

arm64: dts: ls1028a: Fix incorrect I2C clock divider 



Ls1028a platform, the i2c input clock is actually platform pll CLK / 4
(this is the hardware connection), other clock divider can not get the
correct i2c clock, resulting in the output of SCL pin clock is not
accurate.

Signed-off-by: default avatarChuanhua Han <chuanhua.han@nxp.com>
Acked-by: default avatarLi Yang <leoyang.li@nxp.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 52d3406e

arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi

+8 −8
Original line number Diff line number Diff line
@@ -173,7 +173,7 @@ 
			#size-cells = <0>;

			reg = <0x0 0x2000000 0x0 0x10000>;

			interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clockgen 4 1>;

			clocks = <&clockgen 4 3>;

			status = "disabled";

		};
@@ -183,7 +183,7 @@ 
			#size-cells = <0>;

			reg = <0x0 0x2010000 0x0 0x10000>;

			interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clockgen 4 1>;

			clocks = <&clockgen 4 3>;

			status = "disabled";

		};
@@ -193,7 +193,7 @@ 
			#size-cells = <0>;

			reg = <0x0 0x2020000 0x0 0x10000>;

			interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clockgen 4 1>;

			clocks = <&clockgen 4 3>;

			status = "disabled";

		};
@@ -203,7 +203,7 @@ 
			#size-cells = <0>;

			reg = <0x0 0x2030000 0x0 0x10000>;

			interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clockgen 4 1>;

			clocks = <&clockgen 4 3>;

			status = "disabled";

		};
@@ -213,7 +213,7 @@ 
			#size-cells = <0>;

			reg = <0x0 0x2040000 0x0 0x10000>;

			interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clockgen 4 1>;

			clocks = <&clockgen 4 3>;

			status = "disabled";

		};
@@ -223,7 +223,7 @@ 
			#size-cells = <0>;

			reg = <0x0 0x2050000 0x0 0x10000>;

			interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clockgen 4 1>;

			clocks = <&clockgen 4 3>;

			status = "disabled";

		};
@@ -233,7 +233,7 @@ 
			#size-cells = <0>;

			reg = <0x0 0x2060000 0x0 0x10000>;

			interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clockgen 4 1>;

			clocks = <&clockgen 4 3>;

			status = "disabled";

		};
@@ -243,7 +243,7 @@ 
			#size-cells = <0>;

			reg = <0x0 0x2070000 0x0 0x10000>;

			interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clockgen 4 1>;

			clocks = <&clockgen 4 3>;

			status = "disabled";

		};