Loading Documentation/admin-guide/kernel-parameters.txt +7 −0 Original line number Diff line number Diff line Loading @@ -7020,3 +7020,10 @@ management firmware translates the requests into actual hardware states (core frequency, data fabric and memory clocks etc.) active Use amd_pstate_epp driver instance as the scaling driver, driver provides a hint to the hardware if software wants to bias toward performance (0x0) or energy efficiency (0xff) to the CPPC firmware. then CPPC power algorithm will calculate the runtime workload and adjust the realtime cores frequency. Documentation/admin-guide/pm/amd-pstate.rst +72 −2 Original line number Diff line number Diff line Loading @@ -262,6 +262,25 @@ lowest non-linear performance in `AMD CPPC Performance Capability <perf_cap_>`_.) This attribute is read-only. ``energy_performance_available_preferences`` A list of all the supported EPP preferences that could be used for ``energy_performance_preference`` on this system. These profiles represent different hints that are provided to the low-level firmware about the user's desired energy vs efficiency tradeoff. ``default`` represents the epp value is set by platform firmware. This attribute is read-only. ``energy_performance_preference`` The current energy performance preference can be read from this attribute. and user can change current preference according to energy or performance needs Please get all support profiles list from ``energy_performance_available_preferences`` attribute, all the profiles are integer values defined between 0 to 255 when EPP feature is enabled by platform firmware, if EPP feature is disabled, driver will ignore the written value This attribute is read-write. Other performance and frequency values can be read back from ``/sys/devices/system/cpu/cpuX/acpi_cppc/``, see :ref:`cppc_sysfs`. Loading @@ -280,8 +299,30 @@ module which supports the new AMD P-States mechanism on most of the future AMD platforms. The AMD P-States mechanism is the more performance and energy efficiency frequency management method on AMD processors. Kernel Module Options for ``amd-pstate`` ========================================= AMD Pstate Driver Operation Modes ================================= ``amd_pstate`` CPPC has two operation modes: CPPC Autonomous(active) mode and CPPC non-autonomous(passive) mode. active mode and passive mode can be chosen by different kernel parameters. When in Autonomous mode, CPPC ignores requests done in the Desired Performance Target register and takes into account only the values set to the Minimum requested performance, Maximum requested performance, and Energy Performance Preference registers. When Autonomous is disabled, it only considers the Desired Performance Target. Active Mode ------------ ``amd_pstate=active`` This is the low-level firmware control mode which is implemented by ``amd_pstate_epp`` driver with ``amd_pstate=active`` passed to the kernel in the command line. In this mode, ``amd_pstate_epp`` driver provides a hint to the hardware if software wants to bias toward performance (0x0) or energy efficiency (0xff) to the CPPC firmware. then CPPC power algorithm will calculate the runtime workload and adjust the realtime cores frequency according to the power supply and thermal, core voltage and some other hardware conditions. Passive Mode ------------ Loading @@ -298,6 +339,35 @@ processor must provide at least nominal performance requested and go higher if c operating conditions allow. User Space Interface in ``sysfs`` ================================= Global Attributes ----------------- ``amd-pstate`` exposes several global attributes (files) in ``sysfs`` to control its functionality at the system level. They are located in the ``/sys/devices/system/cpu/amd-pstate/`` directory and affect all CPUs. ``status`` Operation mode of the driver: "active", "passive" or "disable". "active" The driver is functional and in the ``active mode`` "passive" The driver is functional and in the ``passive mode`` "disable" The driver is unregistered and not functional now. This attribute can be written to in order to change the driver's operation mode or to unregister it. The string written to it must be one of the possible values of it and, if successful, writing one of these values to the sysfs file will cause the driver to switch over to the operation mode represented by that string - or to be unregistered in the "disable" case. ``cpupower`` tool support for ``amd-pstate`` =============================================== Loading drivers/acpi/cppc_acpi.c +67 −0 Original line number Diff line number Diff line Loading @@ -1153,6 +1153,19 @@ int cppc_get_nominal_perf(int cpunum, u64 *nominal_perf) return cppc_get_perf(cpunum, NOMINAL_PERF, nominal_perf); } /** * cppc_get_epp_perf - Get the epp register value. * @cpunum: CPU from which to get epp preference value. * @epp_perf: Return address. * * Return: 0 for success, -EIO otherwise. */ int cppc_get_epp_perf(int cpunum, u64 *epp_perf) { return cppc_get_perf(cpunum, ENERGY_PERF, epp_perf); } EXPORT_SYMBOL_GPL(cppc_get_epp_perf); /** * cppc_get_perf_caps - Get a CPU's performance capabilities. * @cpunum: CPU from which to get capabilities info. Loading Loading @@ -1365,6 +1378,60 @@ int cppc_get_perf_ctrs(int cpunum, struct cppc_perf_fb_ctrs *perf_fb_ctrs) } EXPORT_SYMBOL_GPL(cppc_get_perf_ctrs); /* * Set Energy Performance Preference Register value through * Performance Controls Interface */ int cppc_set_epp_perf(int cpu, struct cppc_perf_ctrls *perf_ctrls, bool enable) { int pcc_ss_id = per_cpu(cpu_pcc_subspace_idx, cpu); struct cpc_register_resource *epp_set_reg; struct cpc_register_resource *auto_sel_reg; struct cpc_desc *cpc_desc = per_cpu(cpc_desc_ptr, cpu); struct cppc_pcc_data *pcc_ss_data = NULL; int ret; if (!cpc_desc) { pr_debug("No CPC descriptor for CPU:%d\n", cpu); return -ENODEV; } auto_sel_reg = &cpc_desc->cpc_regs[AUTO_SEL_ENABLE]; epp_set_reg = &cpc_desc->cpc_regs[ENERGY_PERF]; if (CPC_IN_PCC(epp_set_reg) || CPC_IN_PCC(auto_sel_reg)) { if (pcc_ss_id < 0) { pr_debug("Invalid pcc_ss_id for CPU:%d\n", cpu); return -ENODEV; } if (CPC_SUPPORTED(auto_sel_reg)) { ret = cpc_write(cpu, auto_sel_reg, enable); if (ret) return ret; } if (CPC_SUPPORTED(epp_set_reg)) { ret = cpc_write(cpu, epp_set_reg, perf_ctrls->energy_perf); if (ret) return ret; } pcc_ss_data = pcc_data[pcc_ss_id]; down_write(&pcc_ss_data->pcc_lock); /* after writing CPC, transfer the ownership of PCC to platform */ ret = send_pcc_cmd(pcc_ss_id, CMD_WRITE); up_write(&pcc_ss_data->pcc_lock); } else { ret = -ENOTSUPP; pr_debug("_CPC in PCC is not supported\n"); } return ret; } EXPORT_SYMBOL_GPL(cppc_set_epp_perf); /** * cppc_set_enable - Set to enable CPPC on the processor by writing the * Continuous Performance Control package EnableRegister field. Loading drivers/cpufreq/Kconfig +0 −10 Original line number Diff line number Diff line Loading @@ -3,7 +3,6 @@ menu "CPU Frequency scaling" config CPU_FREQ bool "CPU Frequency scaling" select SRCU help CPU Frequency scaling allows you to change the clock speed of CPUs on the fly. This is a nice method to save power, because Loading Loading @@ -270,15 +269,6 @@ config LOONGSON2_CPUFREQ Loongson2F and its successors support this feature. If in doubt, say N. config LOONGSON1_CPUFREQ tristate "Loongson1 CPUFreq Driver" depends on LOONGSON1_LS1B help This option adds a CPUFreq driver for loongson1 processors which support software configurable cpu frequency. If in doubt, say N. endif Loading drivers/cpufreq/Makefile +0 −1 Original line number Diff line number Diff line Loading @@ -111,7 +111,6 @@ obj-$(CONFIG_POWERNV_CPUFREQ) += powernv-cpufreq.o obj-$(CONFIG_BMIPS_CPUFREQ) += bmips-cpufreq.o obj-$(CONFIG_IA64_ACPI_CPUFREQ) += ia64-acpi-cpufreq.o obj-$(CONFIG_LOONGSON2_CPUFREQ) += loongson2_cpufreq.o obj-$(CONFIG_LOONGSON1_CPUFREQ) += loongson1-cpufreq.o obj-$(CONFIG_SH_CPU_FREQ) += sh-cpufreq.o obj-$(CONFIG_SPARC_US2E_CPUFREQ) += sparc-us2e-cpufreq.o obj-$(CONFIG_SPARC_US3_CPUFREQ) += sparc-us3-cpufreq.o Loading
Documentation/admin-guide/kernel-parameters.txt +7 −0 Original line number Diff line number Diff line Loading @@ -7020,3 +7020,10 @@ management firmware translates the requests into actual hardware states (core frequency, data fabric and memory clocks etc.) active Use amd_pstate_epp driver instance as the scaling driver, driver provides a hint to the hardware if software wants to bias toward performance (0x0) or energy efficiency (0xff) to the CPPC firmware. then CPPC power algorithm will calculate the runtime workload and adjust the realtime cores frequency.
Documentation/admin-guide/pm/amd-pstate.rst +72 −2 Original line number Diff line number Diff line Loading @@ -262,6 +262,25 @@ lowest non-linear performance in `AMD CPPC Performance Capability <perf_cap_>`_.) This attribute is read-only. ``energy_performance_available_preferences`` A list of all the supported EPP preferences that could be used for ``energy_performance_preference`` on this system. These profiles represent different hints that are provided to the low-level firmware about the user's desired energy vs efficiency tradeoff. ``default`` represents the epp value is set by platform firmware. This attribute is read-only. ``energy_performance_preference`` The current energy performance preference can be read from this attribute. and user can change current preference according to energy or performance needs Please get all support profiles list from ``energy_performance_available_preferences`` attribute, all the profiles are integer values defined between 0 to 255 when EPP feature is enabled by platform firmware, if EPP feature is disabled, driver will ignore the written value This attribute is read-write. Other performance and frequency values can be read back from ``/sys/devices/system/cpu/cpuX/acpi_cppc/``, see :ref:`cppc_sysfs`. Loading @@ -280,8 +299,30 @@ module which supports the new AMD P-States mechanism on most of the future AMD platforms. The AMD P-States mechanism is the more performance and energy efficiency frequency management method on AMD processors. Kernel Module Options for ``amd-pstate`` ========================================= AMD Pstate Driver Operation Modes ================================= ``amd_pstate`` CPPC has two operation modes: CPPC Autonomous(active) mode and CPPC non-autonomous(passive) mode. active mode and passive mode can be chosen by different kernel parameters. When in Autonomous mode, CPPC ignores requests done in the Desired Performance Target register and takes into account only the values set to the Minimum requested performance, Maximum requested performance, and Energy Performance Preference registers. When Autonomous is disabled, it only considers the Desired Performance Target. Active Mode ------------ ``amd_pstate=active`` This is the low-level firmware control mode which is implemented by ``amd_pstate_epp`` driver with ``amd_pstate=active`` passed to the kernel in the command line. In this mode, ``amd_pstate_epp`` driver provides a hint to the hardware if software wants to bias toward performance (0x0) or energy efficiency (0xff) to the CPPC firmware. then CPPC power algorithm will calculate the runtime workload and adjust the realtime cores frequency according to the power supply and thermal, core voltage and some other hardware conditions. Passive Mode ------------ Loading @@ -298,6 +339,35 @@ processor must provide at least nominal performance requested and go higher if c operating conditions allow. User Space Interface in ``sysfs`` ================================= Global Attributes ----------------- ``amd-pstate`` exposes several global attributes (files) in ``sysfs`` to control its functionality at the system level. They are located in the ``/sys/devices/system/cpu/amd-pstate/`` directory and affect all CPUs. ``status`` Operation mode of the driver: "active", "passive" or "disable". "active" The driver is functional and in the ``active mode`` "passive" The driver is functional and in the ``passive mode`` "disable" The driver is unregistered and not functional now. This attribute can be written to in order to change the driver's operation mode or to unregister it. The string written to it must be one of the possible values of it and, if successful, writing one of these values to the sysfs file will cause the driver to switch over to the operation mode represented by that string - or to be unregistered in the "disable" case. ``cpupower`` tool support for ``amd-pstate`` =============================================== Loading
drivers/acpi/cppc_acpi.c +67 −0 Original line number Diff line number Diff line Loading @@ -1153,6 +1153,19 @@ int cppc_get_nominal_perf(int cpunum, u64 *nominal_perf) return cppc_get_perf(cpunum, NOMINAL_PERF, nominal_perf); } /** * cppc_get_epp_perf - Get the epp register value. * @cpunum: CPU from which to get epp preference value. * @epp_perf: Return address. * * Return: 0 for success, -EIO otherwise. */ int cppc_get_epp_perf(int cpunum, u64 *epp_perf) { return cppc_get_perf(cpunum, ENERGY_PERF, epp_perf); } EXPORT_SYMBOL_GPL(cppc_get_epp_perf); /** * cppc_get_perf_caps - Get a CPU's performance capabilities. * @cpunum: CPU from which to get capabilities info. Loading Loading @@ -1365,6 +1378,60 @@ int cppc_get_perf_ctrs(int cpunum, struct cppc_perf_fb_ctrs *perf_fb_ctrs) } EXPORT_SYMBOL_GPL(cppc_get_perf_ctrs); /* * Set Energy Performance Preference Register value through * Performance Controls Interface */ int cppc_set_epp_perf(int cpu, struct cppc_perf_ctrls *perf_ctrls, bool enable) { int pcc_ss_id = per_cpu(cpu_pcc_subspace_idx, cpu); struct cpc_register_resource *epp_set_reg; struct cpc_register_resource *auto_sel_reg; struct cpc_desc *cpc_desc = per_cpu(cpc_desc_ptr, cpu); struct cppc_pcc_data *pcc_ss_data = NULL; int ret; if (!cpc_desc) { pr_debug("No CPC descriptor for CPU:%d\n", cpu); return -ENODEV; } auto_sel_reg = &cpc_desc->cpc_regs[AUTO_SEL_ENABLE]; epp_set_reg = &cpc_desc->cpc_regs[ENERGY_PERF]; if (CPC_IN_PCC(epp_set_reg) || CPC_IN_PCC(auto_sel_reg)) { if (pcc_ss_id < 0) { pr_debug("Invalid pcc_ss_id for CPU:%d\n", cpu); return -ENODEV; } if (CPC_SUPPORTED(auto_sel_reg)) { ret = cpc_write(cpu, auto_sel_reg, enable); if (ret) return ret; } if (CPC_SUPPORTED(epp_set_reg)) { ret = cpc_write(cpu, epp_set_reg, perf_ctrls->energy_perf); if (ret) return ret; } pcc_ss_data = pcc_data[pcc_ss_id]; down_write(&pcc_ss_data->pcc_lock); /* after writing CPC, transfer the ownership of PCC to platform */ ret = send_pcc_cmd(pcc_ss_id, CMD_WRITE); up_write(&pcc_ss_data->pcc_lock); } else { ret = -ENOTSUPP; pr_debug("_CPC in PCC is not supported\n"); } return ret; } EXPORT_SYMBOL_GPL(cppc_set_epp_perf); /** * cppc_set_enable - Set to enable CPPC on the processor by writing the * Continuous Performance Control package EnableRegister field. Loading
drivers/cpufreq/Kconfig +0 −10 Original line number Diff line number Diff line Loading @@ -3,7 +3,6 @@ menu "CPU Frequency scaling" config CPU_FREQ bool "CPU Frequency scaling" select SRCU help CPU Frequency scaling allows you to change the clock speed of CPUs on the fly. This is a nice method to save power, because Loading Loading @@ -270,15 +269,6 @@ config LOONGSON2_CPUFREQ Loongson2F and its successors support this feature. If in doubt, say N. config LOONGSON1_CPUFREQ tristate "Loongson1 CPUFreq Driver" depends on LOONGSON1_LS1B help This option adds a CPUFreq driver for loongson1 processors which support software configurable cpu frequency. If in doubt, say N. endif Loading
drivers/cpufreq/Makefile +0 −1 Original line number Diff line number Diff line Loading @@ -111,7 +111,6 @@ obj-$(CONFIG_POWERNV_CPUFREQ) += powernv-cpufreq.o obj-$(CONFIG_BMIPS_CPUFREQ) += bmips-cpufreq.o obj-$(CONFIG_IA64_ACPI_CPUFREQ) += ia64-acpi-cpufreq.o obj-$(CONFIG_LOONGSON2_CPUFREQ) += loongson2_cpufreq.o obj-$(CONFIG_LOONGSON1_CPUFREQ) += loongson1-cpufreq.o obj-$(CONFIG_SH_CPU_FREQ) += sh-cpufreq.o obj-$(CONFIG_SPARC_US2E_CPUFREQ) += sparc-us2e-cpufreq.o obj-$(CONFIG_SPARC_US3_CPUFREQ) += sparc-us3-cpufreq.o
