Commit cecde184 authored by Tomer Tayar's avatar Tomer Tayar Committed by Oded Gabbay
Browse files

habanalabs/gaudi2: print RAZWI info upon PCIe access error 



Add the dump of the RAZWI information when a PCIe access is blocked by
RR.

Signed-off-by: default avatarTomer Tayar <ttayar@habana.ai>
Reviewed-by: default avatarOded Gabbay <ogabbay@kernel.org>
Signed-off-by: default avatarOded Gabbay <ogabbay@kernel.org>
parent 82736b06

drivers/misc/habanalabs/gaudi2/gaudi2.c

+48 −4
Original line number Diff line number Diff line
@@ -7963,14 +7963,58 @@ static void gaudi2_handle_dma_core_event(struct hl_device *hdev, u64 intr_cause_ 
						gaudi2_dma_core_interrupts_cause[i]);

}



static void gaudi2_print_pcie_mstr_rr_mstr_if_razwi_info(struct hl_device *hdev)

{

	u32 mstr_if_base_addr = mmPCIE_MSTR_RR_MSTR_IF_RR_SHRD_HBW_BASE, razwi_happened_addr;



	razwi_happened_addr = mstr_if_base_addr + RR_SHRD_HBW_AW_RAZWI_HAPPENED;

	if (RREG32(razwi_happened_addr)) {

		gaudi2_razwi_rr_hbw_shared_printf_info(hdev, mstr_if_base_addr, true, "PCIE", true,

							NULL);

		WREG32(razwi_happened_addr, 0x1);

	}



	razwi_happened_addr = mstr_if_base_addr + RR_SHRD_HBW_AR_RAZWI_HAPPENED;

	if (RREG32(razwi_happened_addr)) {

		gaudi2_razwi_rr_hbw_shared_printf_info(hdev, mstr_if_base_addr, false, "PCIE", true,

							NULL);

		WREG32(razwi_happened_addr, 0x1);

	}



	razwi_happened_addr = mstr_if_base_addr + RR_SHRD_LBW_AW_RAZWI_HAPPENED;

	if (RREG32(razwi_happened_addr)) {

		gaudi2_razwi_rr_lbw_shared_printf_info(hdev, mstr_if_base_addr, true, "PCIE", true,

							NULL);

		WREG32(razwi_happened_addr, 0x1);

	}



	razwi_happened_addr = mstr_if_base_addr + RR_SHRD_LBW_AR_RAZWI_HAPPENED;

	if (RREG32(razwi_happened_addr)) {

		gaudi2_razwi_rr_lbw_shared_printf_info(hdev, mstr_if_base_addr, false, "PCIE", true,

							NULL);

		WREG32(razwi_happened_addr, 0x1);

	}

}



static void gaudi2_print_pcie_addr_dec_info(struct hl_device *hdev, u64 intr_cause_data)

{

	int i;



	for (i = 0 ; i < GAUDI2_NUM_OF_PCIE_ADDR_DEC_ERR_CAUSE; i++)

		if (intr_cause_data & BIT_ULL(i))

	for (i = 0 ; i < GAUDI2_NUM_OF_PCIE_ADDR_DEC_ERR_CAUSE ; i++) {

		if (!(intr_cause_data & BIT_ULL(i)))

			continue;



		dev_err_ratelimited(hdev->dev, "PCIE ADDR DEC Error: %s\n",

					gaudi2_pcie_addr_dec_error_cause[i]);



		switch (intr_cause_data & BIT_ULL(i)) {

		case PCIE_WRAP_PCIE_IC_SEI_INTR_IND_AXI_LBW_ERR_INTR_MASK:

			break;

		case PCIE_WRAP_PCIE_IC_SEI_INTR_IND_BAD_ACCESS_INTR_MASK:

			gaudi2_print_pcie_mstr_rr_mstr_if_razwi_info(hdev);

			break;

		}

	}

}



static void gaudi2_handle_pif_fatal(struct hl_device *hdev, u64 intr_cause_data)

drivers/misc/habanalabs/gaudi2/gaudi2_masks.h

+13 −0
Original line number Diff line number Diff line
@@ -144,4 +144,17 @@ 
#define DCORE0_SYNC_MNGR_OBJS_SOB_OBJ_SIGN_SHIFT	15

#define DCORE0_SYNC_MNGR_OBJS_SOB_OBJ_SIGN_MASK		0x8000



#define PCIE_WRAP_PCIE_IC_SEI_INTR_IND_AXI_ERR_INTR_SHIFT		0

#define PCIE_WRAP_PCIE_IC_SEI_INTR_IND_AXI_ERR_INTR_MASK		0x1

#define PCIE_WRAP_PCIE_IC_SEI_INTR_IND_AXI_LBW_ERR_INTR_SHIFT		1

#define PCIE_WRAP_PCIE_IC_SEI_INTR_IND_AXI_LBW_ERR_INTR_MASK		0x2

#define PCIE_WRAP_PCIE_IC_SEI_INTR_IND_BAD_ACCESS_INTR_SHIFT		2

#define PCIE_WRAP_PCIE_IC_SEI_INTR_IND_BAD_ACCESS_INTR_MASK		0x4

#define PCIE_WRAP_PCIE_IC_SEI_INTR_IND_AXI_ERR_INTR_MASK_SHIFT		3

#define PCIE_WRAP_PCIE_IC_SEI_INTR_IND_AXI_ERR_INTR_MASK_MASK		0x8

#define PCIE_WRAP_PCIE_IC_SEI_INTR_IND_AXI_LBW_ERR_INTR_MASK_SHIFT	4

#define PCIE_WRAP_PCIE_IC_SEI_INTR_IND_AXI_LBW_ERR_INTR_MASK_MASK	0x10

#define PCIE_WRAP_PCIE_IC_SEI_INTR_IND_BAD_ACCESS_INTR_MASK_SHIFT	5

#define PCIE_WRAP_PCIE_IC_SEI_INTR_IND_BAD_ACCESS_INTR_MASK_MASK	0x20



#endif /* GAUDI2_MASKS_H_ */