Unverified Commit ce207be3 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'ti-keystone-dt-for-v6.5' of... 

Merge tag 'ti-keystone-dt-for-v6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into soc/dt

Keystone2 device tree updates for v6.5

Cosmetic cleanups:
* Do not capitalize hex digits
* Unify pinctrl-single pin group nodes for keystone
* Fix eeprom node names

* tag 'ti-keystone-dt-for-v6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux:
  ARM: dts: keystone: Do not capitalize hex digits
  ARM: dts: keystone: Remove ti,keystone from soc node compatible
  ARM: dts: keystone: Fix EEPROM node names
  ARM: dts: Unify pinctrl-single pin group nodes for keystone

Link: https://lore.kernel.org/r/20230615164127.qcgwrbwpmclx5wlm@landscape


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents d09d747e 2d62aab5

arch/arm/boot/dts/keystone-k2e-evm.dts

+2 −2
Original line number Diff line number Diff line
@@ -78,7 +78,7 @@ 
};



&i2c0 {

	dtt@50 {

	eeprom@50 {

		compatible = "atmel,24c1024";

		reg = <0x50>;

	};
@@ -130,7 +130,7 @@ 


			partition@180000 {

				label = "ubifs";

				reg = <0x180000 0x1FE80000>;

				reg = <0x180000 0x1fe80000>;

			};

		};

	};

arch/arm/boot/dts/keystone-k2e-netcp.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -167,7 +167,7 @@ netcp: netcp@24000000 { 
						 <&tsipclka>, <&tsrefclk>,

						 <&tsipclkb>;

					ti,mux-tbl = <0x0>, <0x1>, <0x2>,

						<0x3>, <0x4>, <0x8>, <0xC>;

						<0x3>, <0x4>, <0x8>, <0xc>;

					assigned-clocks = <&cpts_refclk_mux>;

					assigned-clock-parents = <&chipclk12>;

				};

arch/arm/boot/dts/keystone-k2g-evm.dts

+21 −21
Original line number Diff line number Diff line
@@ -120,14 +120,14 @@ 
};



&k2g_pinctrl {

	uart0_pins: pinmux_uart0_pins {

	uart0_pins: uart0-pins {

		pinctrl-single,pins = <

			K2G_CORE_IOPAD(0x11cc) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0)	/* uart0_rxd.uart0_rxd */

			K2G_CORE_IOPAD(0x11d0) (BUFFER_CLASS_B | PIN_PULLDOWN | MUX_MODE0)	/* uart0_txd.uart0_txd */

		>;

	};



	mmc0_pins: pinmux_mmc0_pins {

	mmc0_pins: mmc0-pins {

		pinctrl-single,pins = <

			K2G_CORE_IOPAD(0x1300) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE2)	/* mmc0_dat3.mmc0_dat3 */

			K2G_CORE_IOPAD(0x1304) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE2)	/* mmc0_dat2.mmc0_dat2 */
@@ -139,7 +139,7 @@ 
		>;

	};



	mmc1_pins: pinmux_mmc1_pins {

	mmc1_pins: mmc1-pins {

		pinctrl-single,pins = <

			K2G_CORE_IOPAD(0x10ec) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0)	/* mmc1_dat7.mmc1_dat7 */

			K2G_CORE_IOPAD(0x10f0) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0)	/* mmc1_dat6.mmc1_dat6 */
@@ -154,27 +154,27 @@ 
		>;

	};



	i2c0_pins: pinmux_i2c0_pins {

	i2c0_pins: i2c0-pins {

		pinctrl-single,pins = <

			K2G_CORE_IOPAD(0x137c) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0)	/* i2c0_scl.i2c0_scl */

			K2G_CORE_IOPAD(0x1380) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0)	/* i2c0_sda.i2c0_sda */

		>;

	};



	i2c1_pins: pinmux_i2c1_pins {

	i2c1_pins: i2c1-pins {

		pinctrl-single,pins = <

			K2G_CORE_IOPAD(0x1384) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0)	/* i2c1_scl.i2c1_scl */

			K2G_CORE_IOPAD(0x1388) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0)	/* i2c1_sda.i2c1_sda */

		>;

	};



	ecap0_pins: ecap0_pins {

	ecap0_pins: ecap0-pins {

		pinctrl-single,pins = <

			K2G_CORE_IOPAD(0x1374) (BUFFER_CLASS_B | MUX_MODE4)	/* pr1_mdio_data.ecap0_in_apwm0_out */

		>;

	};



	spi1_pins: pinmux_spi1_pins {

	spi1_pins: spi1-pins {

		pinctrl-single,pins = <

			K2G_CORE_IOPAD(0x11a4) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0)	/* spi1_scs0.spi1_scs0 */

			K2G_CORE_IOPAD(0x11ac) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0)	/* spi1_clk.spi1_clk */
@@ -183,7 +183,7 @@ 
		>;

	};



	qspi_pins: pinmux_qspi_pins {

	qspi_pins: qspi-pins {

		pinctrl-single,pins = <

			K2G_CORE_IOPAD(0x1204) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* qspi_clk.qspi_clk */

			K2G_CORE_IOPAD(0x1208) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* qspi_rclk.qspi_rclk */
@@ -195,52 +195,52 @@ 
		>;

	};



	uart2_pins: pinmux_uart2_pins {

	uart2_pins: uart2-pins {

		pinctrl-single,pins = <

			K2G_CORE_IOPAD(0x11ec) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0)      /* uart2_rxd.uart2_rxd */

			K2G_CORE_IOPAD(0x11f0) (BUFFER_CLASS_B | PIN_PULLDOWN | MUX_MODE0)      /* uart2_txd.uart2_txd */

		>;

	};



	dcan0_pins: pinmux_dcan0_pins {

	dcan0_pins: dcan0-pins {

		pinctrl-single,pins = <

			K2G_CORE_IOPAD(0x11fc) (BUFFER_CLASS_B | PULL_DISABLE  | MUX_MODE0)	/* dcan0tx.dcan0tx */

			K2G_CORE_IOPAD(0x1200) (BUFFER_CLASS_B | PIN_PULLDOWN  | MUX_MODE0)	/* dcan0rx.dcan0rx */

		>;

	};



	dcan1_pins: pinmux_dcan1_pins {

	dcan1_pins: dcan1-pins {

		pinctrl-single,pins = <

			K2G_CORE_IOPAD(0x1224) (BUFFER_CLASS_B | PULL_DISABLE  | MUX_MODE1)	/* qspicsn2.dcan1tx */

			K2G_CORE_IOPAD(0x1228) (BUFFER_CLASS_B | PIN_PULLDOWN  | MUX_MODE1)	/* qspicsn3.dcan1rx */

		>;

	};



	emac_pins: pinmux_emac_pins {

	emac_pins: emac-pins {

		pinctrl-single,pins = <

			K2G_CORE_IOPAD(0x113C) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1)	/* MII_RXD1.RGMII_RXD1 */

			K2G_CORE_IOPAD(0x113c) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1)	/* MII_RXD1.RGMII_RXD1 */

			K2G_CORE_IOPAD(0x1138) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1)	/* MII_RXD2.RGMII_RXD2 */

			K2G_CORE_IOPAD(0x1134) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1)	/* MII_RXD3.RGMII_RXD3 */

			K2G_CORE_IOPAD(0x1140) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1)	/* MII_RXD0.RGMII_RXD0 */

			K2G_CORE_IOPAD(0x1178) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1)	/* MII_TXD0.RGMII_TXD0 */

			K2G_CORE_IOPAD(0x1174) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1)	/* MII_TXD1.RGMII_TXD1 */

			K2G_CORE_IOPAD(0x1170) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1)	/* MII_TXD2.RGMII_TXD2 */

			K2G_CORE_IOPAD(0x116C) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1)	/* MII_TXD3.RGMII_TXD3 */

			K2G_CORE_IOPAD(0x116c) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1)	/* MII_TXD3.RGMII_TXD3 */

			K2G_CORE_IOPAD(0x1154) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1)	/* MII_TXCLK.RGMII_TXC */

			K2G_CORE_IOPAD(0x117C) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1)	/* MII_TXEN.RGMII_TXCTL */

			K2G_CORE_IOPAD(0x117c) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1)	/* MII_TXEN.RGMII_TXCTL */

			K2G_CORE_IOPAD(0x1120) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1)	/* MII_RXCLK.RGMII_RXC */

			K2G_CORE_IOPAD(0x1144) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1)	/* MII_RXDV.RGMII_RXCTL */

		>;

	};



	mdio_pins: pinmux_mdio_pins {

	mdio_pins: mdio-pins {

		pinctrl-single,pins = <

			K2G_CORE_IOPAD(0x118C) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0)	/* MDIO_CLK.MDIO_CLK */

			K2G_CORE_IOPAD(0x118c) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0)	/* MDIO_CLK.MDIO_CLK */

			K2G_CORE_IOPAD(0x1188) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0)	/* MDIO_DATA.MDIO_DATA */

		>;

	};



	vout_pins: pinmux_vout_pins {

	vout_pins: vout-pins {

		pinctrl-single,pins = <

			K2G_CORE_IOPAD(0x1078) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata23.dssdata23 */

			K2G_CORE_IOPAD(0x107c) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata22.dssdata22 */
@@ -274,7 +274,7 @@ 
		>;

	};



	mcasp2_pins: pinmux_mcasp2_pins {

	mcasp2_pins: mcasp2-pins {

		pinctrl-single,pins = <

			K2G_CORE_IOPAD(0x1234) (BUFFER_CLASS_B | PIN_PULLDOWN | MUX_MODE4) /* pr0_pru_gpo2.mcasp2_axr2 */

			K2G_CORE_IOPAD(0x1238) (BUFFER_CLASS_B | PIN_PULLDOWN | MUX_MODE4) /* pr0_pru_gpo3.mcasp2_axr3 */
@@ -424,11 +424,11 @@ 
		};

		partition@4 {

			label = "QSPI.kernel";

			reg = <0x001C0000 0x0800000>;

			reg = <0x001c0000 0x0800000>;

		};

		partition@5 {

			label = "QSPI.file-system";

			reg = <0x009C0000 0x3640000>;

			reg = <0x009c0000 0x3640000>;

		};

	};

};

arch/arm/boot/dts/keystone-k2g-ice.dts

+15 −15
Original line number Diff line number Diff line
@@ -218,14 +218,14 @@ 
};



&k2g_pinctrl {

	uart0_pins: pinmux_uart0_pins {

	uart0_pins: uart0-pins {

		pinctrl-single,pins = <

			K2G_CORE_IOPAD(0x11cc) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0)	/* uart0_rxd.uart0_rxd */

			K2G_CORE_IOPAD(0x11d0) (BUFFER_CLASS_B | PIN_PULLDOWN | MUX_MODE0)	/* uart0_txd.uart0_txd */

		>;

	};



	qspi_pins: pinmux_qspi_pins {

	qspi_pins: qspi-pins {

		pinctrl-single,pins = <

			K2G_CORE_IOPAD(0x1204) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* qspi_clk.qspi_clk */

			K2G_CORE_IOPAD(0x1208) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* qspi_rclk.qspi_rclk */
@@ -237,35 +237,35 @@ 
		>;

	};



	mmc1_pins: pinmux_mmc1_pins {

	mmc1_pins: mmc1-pins {

		pinctrl-single,pins = <

			K2G_CORE_IOPAD(0x10FC) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0)	/* mmc1_dat3.mmc1_dat3 */

			K2G_CORE_IOPAD(0x10fc) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0)	/* mmc1_dat3.mmc1_dat3 */

			K2G_CORE_IOPAD(0x1100) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0)	/* mmc1_dat2.mmc1_dat2 */

			K2G_CORE_IOPAD(0x1104) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0)	/* mmc1_dat1.mmc1_dat1 */

			K2G_CORE_IOPAD(0x1108) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0)	/* mmc1_dat0.mmc1_dat0 */

			K2G_CORE_IOPAD(0x110C) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0)	/* mmc1_clk.mmc1_clk */

			K2G_CORE_IOPAD(0x110c) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0)	/* mmc1_clk.mmc1_clk */

			K2G_CORE_IOPAD(0x1110) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0)	/* mmc1_cmd.mmc1_cmd */

			K2G_CORE_IOPAD(0x1114) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE3)	/* mmc1_sdcd.gpio0_69 */

			K2G_CORE_IOPAD(0x1118) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0)	/* mmc1_sdwp.mmc1_sdwp */

			K2G_CORE_IOPAD(0x111C) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0)	/* mmc1_pow.mmc1_pow */

			K2G_CORE_IOPAD(0x111c) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0)	/* mmc1_pow.mmc1_pow */

		>;

	};



	i2c0_pins: pinmux_i2c0_pins {

	i2c0_pins: i2c0-pins {

		pinctrl-single,pins = <

			K2G_CORE_IOPAD(0x137c) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0)	/* i2c0_scl.i2c0_scl */

			K2G_CORE_IOPAD(0x1380) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0)	/* i2c0_sda.i2c0_sda */

		>;

	};



	i2c1_pins: pinmux_i2c1_pins {

	i2c1_pins: i2c1-pins {

		pinctrl-single,pins = <

			K2G_CORE_IOPAD(0x1384) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0)	/* i2c1_scl.i2c1_scl */

			K2G_CORE_IOPAD(0x1388) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0)	/* i2c1_sda.i2c1_sda */

		>;

	};



	user_leds: pinmux_user_leds {

	user_leds: user-leds-pins {

		pinctrl-single,pins = <

			K2G_CORE_IOPAD(0x102c) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE3)	/* gpmc_ad11.gpio0_11 */

			K2G_CORE_IOPAD(0x1030) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE3)	/* gpmc_ad12.gpio0_12 */
@@ -283,26 +283,26 @@ 
		>;

	};



	emac_pins: pinmux_emac_pins {

	emac_pins: emac-pins {

		pinctrl-single,pins = <

			K2G_CORE_IOPAD(0x113C) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1)	/* MII_RXD1.RGMII_RXD1 */

			K2G_CORE_IOPAD(0x113c) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1)	/* MII_RXD1.RGMII_RXD1 */

			K2G_CORE_IOPAD(0x1138) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1)	/* MII_RXD2.RGMII_RXD2 */

			K2G_CORE_IOPAD(0x1134) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1)	/* MII_RXD3.RGMII_RXD3 */

			K2G_CORE_IOPAD(0x1140) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1)	/* MII_RXD0.RGMII_RXD0 */

			K2G_CORE_IOPAD(0x1178) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1)	/* MII_TXD0.RGMII_TXD0 */

			K2G_CORE_IOPAD(0x1174) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1)	/* MII_TXD1.RGMII_TXD1 */

			K2G_CORE_IOPAD(0x1170) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1)	/* MII_TXD2.RGMII_TXD2 */

			K2G_CORE_IOPAD(0x116C) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1)	/* MII_TXD3.RGMII_TXD3 */

			K2G_CORE_IOPAD(0x116c) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1)	/* MII_TXD3.RGMII_TXD3 */

			K2G_CORE_IOPAD(0x1154) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1)	/* MII_TXCLK.RGMII_TXC */

			K2G_CORE_IOPAD(0x117C) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1)	/* MII_TXEN.RGMII_TXCTL */

			K2G_CORE_IOPAD(0x117c) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1)	/* MII_TXEN.RGMII_TXCTL */

			K2G_CORE_IOPAD(0x1120) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1)	/* MII_RXCLK.RGMII_RXC */

			K2G_CORE_IOPAD(0x1144) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1)	/* MII_RXDV.RGMII_RXCTL */

		>;

	};



	mdio_pins: pinmux_mdio_pins {

	mdio_pins: mdio-pins {

		pinctrl-single,pins = <

			K2G_CORE_IOPAD(0x118C) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0)	/* MDIO_CLK.MDIO_CLK */

			K2G_CORE_IOPAD(0x118c) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0)	/* MDIO_CLK.MDIO_CLK */

			K2G_CORE_IOPAD(0x1188) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0)	/* MDIO_DATA.MDIO_DATA */

		>;

	};

arch/arm/boot/dts/keystone-k2g.dtsi

+3 −3
Original line number Diff line number Diff line
@@ -177,7 +177,7 @@ 


		dcan0: can@260b200 {

			compatible = "ti,am4372-d_can", "ti,am3352-d_can";

			reg = <0x0260B200 0x200>;

			reg = <0x0260b200 0x200>;

			interrupts = <GIC_SPI 190 IRQ_TYPE_EDGE_RISING>;

			status = "disabled";

			power-domains = <&k2g_pds 0x0008>;
@@ -186,7 +186,7 @@ 


		dcan1: can@260b400 {

			compatible = "ti,am4372-d_can", "ti,am3352-d_can";

			reg = <0x0260B400 0x200>;

			reg = <0x0260b400 0x200>;

			interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>;

			status = "disabled";

			power-domains = <&k2g_pds 0x0009>;
@@ -593,7 +593,7 @@ 


		spi2: spi@21805c00 {

			compatible = "ti,keystone-spi";

			reg = <0x21805C00 0x200>;

			reg = <0x21805c00 0x200>;

			num-cs = <4>;

			ti,davinci-spi-intr-line = <0>;

			interrupts = <GIC_SPI 68 IRQ_TYPE_EDGE_RISING>;