Commit cdfdeb4a authored by Christophe JAILLET's avatar Christophe JAILLET Committed by Geert Uytterhoeven
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clk: renesas: r9a06g032: Fix some typo in comments 



This file seems to be for R9A06G032 only. So replace reference to
R9A09G032 by R9A06G032 to avoid confusion.

AFAIK, R9A09G032 does'nt exist.

Signed-off-by: default avatarChristophe JAILLET <christophe.jaillet@wanadoo.fr>
Link: https://lore.kernel.org/r/20200413041709.3630-1-christophe.jaillet@wanadoo.fr


Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent 91a577e7

drivers/clk/renesas/r9a06g032-clocks.c

+3 −3
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0

/*

 * R9A09G032 clock driver

 * R9A06G032 clock driver

 *

 * Copyright (C) 2018 Renesas Electronics Europe Limited

 *
@@ -338,8 +338,8 @@ clk_rdesc_get(struct r9a06g032_priv *clocks, 
}



/*

 * This implements the R9A09G032 clock gate 'driver'. We cannot use the system's

 * clock gate framework as the gates on the R9A09G032 have a special enabling

 * This implements the R9A06G032 clock gate 'driver'. We cannot use the system's

 * clock gate framework as the gates on the R9A06G032 have a special enabling

 * sequence, therefore we use this little proxy.

 */

struct r9a06g032_clk_gate {