Commit cdeffe87 authored by Linus Torvalds's avatar Linus Torvalds
Browse files
Pull mailbox updates from Jassi Brar:
 "api:
   - hrtimer fix

  qcom:
   - log pending irq during resume
   - minor cosmetic changes

  omap:
   - use pm_runtime_resume_and_get

  imx:
   - use pm_runtime_resume_and_get
   - remove redundant initializer

  mtk:
   - added GCE header for MT8186
   - enable support for MT8186

  tegra:
   - remove redundant NULL check
   - added hsp_sm_ops for send/recv api
   - support shared mailboxes

  stm:
   - remove unsupported "wakeup" irq

  pcc:
   - sanitize mbox allocated memory before use

  misc:
   - documentation fixes for arm_mhu and qcom-ipcc"

* tag 'mailbox-v5.19' of git://git.linaro.org/landing-teams/working/fujitsu/integration:
  mailbox: qcom-ipcc: Fix -Wunused-function with CONFIG_PM_SLEEP=n
  mailbox: forward the hrtimer if not queued and under a lock
  mailbox: qcom-ipcc: Log the pending interrupt during resume
  mailbox: pcc: Fix an invalid-load caught by the address sanitizer
  dt-bindings: mailbox: remove the IPCC "wakeup" IRQ
  mailbox: correct kerneldoc
  mailbox: omap: using pm_runtime_resume_and_get to simplify the code
  mailbox:imx: using pm_runtime_resume_and_get
  mailbox: mediatek: support mt8186 adsp mailbox
  dt-bindings: mailbox: mtk,adsp-mbox: add mt8186 compatible name
  mailbox: tegra-hsp: Add 128-bit shared mailbox support
  dt-bindings: tegra186-hsp: add type for shared mailboxes
  mailbox: tegra-hsp: Add tegra_hsp_sm_ops
  dt-bindings: gce: add the GCE header file for MT8186
  mailbox: remove an unneeded NULL check on list iterator
  mailbox: imx: remove redundant initializer
  dt-bindings: mailbox: qcom-ipcc: simplify the example
parents 7182e897 79f9fbe3
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+4 −3
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@@ -11,14 +11,15 @@ maintainers:

description: |
  The MTK ADSP mailbox Inter-Processor Communication (IPC) enables the SoC
  to ommunicate with ADSP by passing messages through two mailbox channels.
  to communicate with ADSP by passing messages through two mailbox channels.
  The MTK ADSP mailbox IPC also provides the ability for one processor to
  signal the other processor using interrupts.

properties:
  compatible:
    items:
      - const: mediatek,mt8195-adsp-mbox
    enum:
      - mediatek,mt8195-adsp-mbox
      - mediatek,mt8186-adsp-mbox

  "#mbox-cells":
    const: 0
+9 −0
Original line number Diff line number Diff line
@@ -26,6 +26,15 @@ description: |
  second cell is used to identify the mailbox that the client is going
  to use.

  For shared mailboxes, the first cell composed of two fields:
    - bits 15..8:
        A bit mask of flags that further specifies the type of shared
        mailbox to be used (based on the data size). If no flag is
        specified then, 32-bit shared mailbox is used.
    - bits 7..0:
        Defines the type of the mailbox to be used. This field should be
        TEGRA_HSP_MBOX_TYPE_SM for shared mailboxes.

  For doorbells, the second cell specifies the index of the doorbell to
  use.

+10 −19
Original line number Diff line number Diff line
@@ -73,12 +73,3 @@ examples:
        #interrupt-cells = <3>;
        #mbox-cells = <2>;
    };

        smp2p-modem {
                compatible = "qcom,smp2p";
                interrupts-extended = <&ipcc_mproc IPCC_CLIENT_MPSS
                                IPCC_MPROC_SIGNAL_SMP2P IRQ_TYPE_EDGE_RISING>;
                mboxes = <&ipcc_mproc IPCC_CLIENT_MPSS IPCC_MPROC_SIGNAL_SMP2P>;

                /* Other SMP2P fields */
        };
+3 −8
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@@ -30,15 +30,11 @@ properties:
    items:
      - description: rx channel occupied
      - description: tx channel free
      - description: wakeup source
    minItems: 2

  interrupt-names:
    items:
      - const: rx
      - const: tx
      - const: wakeup
    minItems: 2

  wakeup-source: true

@@ -70,10 +66,9 @@ examples:
      #mbox-cells = <1>;
      reg = <0x4c001000 0x400>;
      st,proc-id = <0>;
      interrupts-extended = <&intc GIC_SPI 100 IRQ_TYPE_NONE>,
      		      <&intc GIC_SPI 101 IRQ_TYPE_NONE>,
      		      <&aiec 62 1>;
      interrupt-names = "rx", "tx", "wakeup";
      interrupts-extended = <&exti 61 1>,
                            <&intc GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
      interrupt-names = "rx", "tx";
      clocks = <&rcc_clk IPCC>;
      wakeup-source;
    };
+1 −1
Original line number Diff line number Diff line
@@ -44,7 +44,7 @@ struct arm_mhu {
};

/**
 * ARM MHU Mailbox allocated channel information
 * struct mhu_db_channel - ARM MHU Mailbox allocated channel information
 *
 * @mhu: Pointer to parent mailbox device
 * @pchan: Physical channel within which this doorbell resides in
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