Commit cde643ff authored by Kan Liang's avatar Kan Liang Committed by Peter Zijlstra
Browse files

perf/x86/intel: Fix pebs event constraints for ADL 



According to the latest event list, the LOAD_LATENCY PEBS event only
works on the GP counter 0 and 1 for ADL and RPL.

Update the pebs event constraints table.

Fixes: f83d2f91 ("perf/x86/intel: Add Alder Lake Hybrid support")
Reported-by: default avatarAmmy Yi <ammy.yi@intel.com>
Signed-off-by: default avatarKan Liang <kan.liang@linux.intel.com>
Signed-off-by: default avatarPeter Zijlstra (Intel) <peterz@infradead.org>
Cc: stable@vger.kernel.org
Link: https://lkml.kernel.org/r/20220818184429.2355857-1-kan.liang@linux.intel.com
parent d4bdb0be

arch/x86/events/intel/ds.c

+1 −1
Original line number Diff line number Diff line
@@ -830,7 +830,7 @@ struct event_constraint intel_glm_pebs_event_constraints[] = { 


struct event_constraint intel_grt_pebs_event_constraints[] = {

	/* Allow all events as PEBS with no flags */

	INTEL_HYBRID_LAT_CONSTRAINT(0x5d0, 0xf),

	INTEL_HYBRID_LAT_CONSTRAINT(0x5d0, 0x3),

	INTEL_HYBRID_LAT_CONSTRAINT(0x6d0, 0xf),

	EVENT_CONSTRAINT_END

};